Visible to Intel only — GUID: xwo1662727993326
Ixiasoft
Visible to Intel only — GUID: xwo1662727993326
Ixiasoft
4.3.1.16. Reset MAC Statistics
For E-tile, in the event of resetting both TX and RX statistic registers, the NIOS controller writes 1 to TX_CNTR_CONFIG Register (offset 0x845) bit 0 to reset all TX statistic registers and writes 1 to RX_CNTR_CONFIG Register (offset 0x945) bit 0 to reset all RX statistic registers. After 20 clock cycles, the NIOS controller issues another write command with 0x0 to TX_CNTR_CONFIG and RX_CNTR_CONFIG registers to release the reset for TX/RX statistic registers.
For F-tile, in the event of resetting both Tx and Rx statistic registers, NIOS write 1 to CNTR_TX_CONFIG CSR (0x1274 offset) bit 0 to reset all TX statistic registers and write 1 to CNTR_RX_CONFIG CSR (0x1278 offset) bit 0 to reset all RX statistic registers. After 20 clock cycles, another write with 0x0 to CNTR_TX_CONFIG CSR and to CNTR_RX_CONFIG CSR to release the reset for TX/RX statistic registers.