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1. Answers to Top FAQs
2. Parameterizable Macros for Intel FPGAs Overview
3. Dual-Port Random Access Memory (RAM) Parameterizable Macros
4. FIFO Parameterizable Macros
5. Document Revision History for the Parameterizable Macros for Intel FPGAs User Guide
6. Parameterizable Macros for Intel FPGAs User Guide Archives
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3.1. Simple Dual-Port RAM Parameterizable Macros
In Simple Dual-Port RAM mode, Port A and Port B are available with two address ports (one at Port A and one at Port B) and one data output port (only at Port B). Port A is the write port that performs write operation according to the write address. Port B is the read port that performs read operation according to the read address and outputs the data.
Figure 2. Simple Dual-Port RAM Block Diagram