Visible to Intel only — GUID: ieb1661511740834
Ixiasoft
Visible to Intel only — GUID: ieb1661511740834
Ixiasoft
12.2. PCS Features in Agilex™ 5 FPGA GTS Transceivers
The PCS contains multiple gearbox implementations to decouple the PMA and PCS interface widths. The GTS transceiver (PMA with optional FEC or PCS) to FPGA fabric interface support from 8 bits up to 66 bits options. This feature allows you to implement a wide range of applications.
The PCS hard IP supports various standard and proprietary protocols across a wide range of data rates and encoding schemes.