1.10. F-Tile Dynamic Reconfiguration Suite Intel FPGA IP v5.0.0
Quartus® Prime Version | Description | Impact |
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22.1 | Added support for the following design example variants:
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All design examples support Verilog and VHDL file formats. | — | |
Added the Agilex I-Series Transceiver-SoC Development Kit support for the following hardware design examples:
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Reconfiguration Group | PMA Type | Modulation | Base and Supported Profiles | FEC Type |
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25GE-1 with IEEE 802.3 RS(528,514) (CL91) FEC | FGT | NRZ | 1x25GE |
IEEE 802.3 RS(528,514) (CL91) |
1x10GE |
None | |||
100GE-4 with IEEE 802.3 RS(528,514) (CL91) FEC | FGT | NRZ PAM4 |
1x100GE-4 |
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1x100GE-2 |
IEEE 802.3 RS(544,514) (CL134) | |||
4x25GE-1 |
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2x50GE-1 |
IEEE 802.3 RS(544,514) (CL134) | |||
400GE-8 with IEEE 802.3 RS(544,514) (CL134) FEC | FGT | PAM4 | 1x400G-8 |
IEEE 802.3 RS(544,514) (CL134) |
2x200GE-4 |
IEEE 802.3 RS(544,514) (CL134) | |||
4x100GE-2 |
IEEE 802.3 RS(544,514) (CL134) |