F-Tile HDMI Intel® FPGA IP Design Example User Guide

ID 709314
Date 6/06/2024
Public
Document Table of Contents

3.4.2. HDMI TX Direction

Table 25.  HDMI TX Direction
Parameter Value Description
DIRECTION Transmitter Determines the selection for HDMI simplex RTL.
SUPPORT DEEP COLOR 1: On Determines if the core can encode deep color formats.
SUPPORT AUXILIARY 1: On Determines if the auxiliary channel encoding is included.
SUPPORT AUDIO 1: On Determines if the core can encode audio.
PIXEL PER CLOCK 8 Supports 8 pixels per clock for Agilex™ 7 devices.
SUPPORT FRL 1: On For Agilex™ 7 devices, only Support FRL =1 is supported.
INCLUDE I2C MASTER/SLAVE 1: On Determines if the I2C master block is included.
ENABLE ACTIVE VIDEO PROTOCOL AXIS-VVP Full Determines the input video data format.
VIDEO IN AND OUT USE THE SAME CLOCK 1: On Set to ON for HDMI 2.1 RX-TX retransmit without video frame buffer design.
0: Off Set to OFF for HDMI 2.1 RX-TX direct retransmit with video frame buffer design.
HDMI21_VARIANT
  • 0: TMDS only
  • 1: FRL and TMDS
Determines the selection of HDMI variant.