F-Tile HDMI Intel® FPGA IP Design Example User Guide

ID 709314
Date 8/15/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.6.6. TX Reconfiguration and Link Training

Perform link training between the Intel HDMI TX and the external HDMI sink.

During the link training process, reconfigure the TX transceiver to the link-trained FRL rate.

Refer to the TX Reconfiguration and Link Training Flowchart figure for more details.