Questa*-Intel® FPGA Edition Quick-Start: Intel® Quartus® Prime Pro Edition

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ID 691278
Date 6/26/2022
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Document Table of Contents
Document Table of Contents x
1. Questa*-Intel® FPGA Edition Quick-Start Intel® Quartus® Prime Pro Edition 2. Known Differences Between the Questa* Intel® FPGA Edition and ModelSim* - Intel® FPGA Edition 3. Questa*-Intel® FPGA Edition Simulation Quick-Start Intel® Quartus® Prime Pro Edition Revision History
1. Questa*-Intel® FPGA Edition Quick-Start Intel® Quartus® Prime Pro Edition x
1.1. Prerequisites 1.2. Open the Example Design 1.3. Specify EDA Tool Settings 1.4. Generate a Simulator Setup Script Template 1.5. Create the Simulation Script 1.6. Compile and Simulate the Design 1.7. View Signal Waveforms 1.8. Add Signals to the Simulation 1.9. Rerun Simulation
1. Questa*-Intel® FPGA Edition Quick-Start Intel® Quartus® Prime Pro Edition
2. Known Differences Between the Questa* Intel® FPGA Edition and ModelSim* - Intel® FPGA Edition
3. Questa*-Intel® FPGA Edition Simulation Quick-Start Intel® Quartus® Prime Pro Edition Revision History

1.7. View Signal Waveforms

Follow these steps to view signals in the testbench_1.v simulation waveform:
  1. Click the Wave window. The simulation waveform ends at 11030 ns, as the testbench specifies. The Wave window lists the CLOCK, WE, OFFSET, RESET_N, and RD_DATA signals.
    Figure 7.  Questa* Intel® FPGA Edition Wave Window
  2. Click the Sim tab to view the signals in the top-level pll_ram.v design. The Sim window synchronizes with the Objects window.
  3. Expand the tb folder in the sim tab to view the top-level module signals.
  4. Expand the Test1 folder. The Objects window displays UP_module, DOWN_module, PLL_module, and RAM_module signals.
  5. In the Sim window, select a module under Test1 to display the module's signals in the Objects window.
    Figure 8.  Questa* Intel® FPGA Edition Sim and Objects Windows
  6. View the simulation library files in the Library window.
Figure 9.  Questa* Intel® FPGA Edition Library Window
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