4G Turbo-V Intel® FPGA IP User Guide

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ID 683882
Date 11/18/2020
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Document Table of Contents
Document Table of Contents x
1. About the 4G Turbo-V Intel® FPGA IP 2. Designing with the 4G Turbo-V Intel® FPGA IP 3. 4G Turbo-V Intel® FPGA IP Functional Description 4. Document Revision History for the 4G Turbo-V Intel® FPGA IP User Guide
1. About the 4G Turbo-V Intel® FPGA IP x
1.1. 4G Turbo-V Intel® FPGA IP Features 1.2. 4G Turbo-V Intel® FPGA IP Device Family Support 1.3. Release Information for the 4G Turbo-V Intel® FPGA IP 1.4. 4G Turbo-V Performance and Resource Utilization
2. Designing with the 4G Turbo-V Intel® FPGA IP x
2.1. 4G Turbo-V IP Directory Structure 2.2. Generating a 4G Turbo-V IP 2.3. Simulating a 4G Turbo-V IP
3. 4G Turbo-V Intel® FPGA IP Functional Description x
3.1. 4G Turbo-V Architecture 3.2. 4G Turbo-V Signals and Interfaces 3.3. 4G Turbo-V Timing Diagrams 3.4. 4G Turbo-V Latency and Throughput
3.2. 4G Turbo-V Signals and Interfaces x
3.2.1. Avalon Streaming Interfaces in DSP Intel FPGA IP
1. About the 4G Turbo-V Intel® FPGA IP
2. Designing with the 4G Turbo-V Intel® FPGA IP
3. 4G Turbo-V Intel® FPGA IP Functional Description
4. Document Revision History for the 4G Turbo-V Intel® FPGA IP User Guide

2.3. Simulating a 4G Turbo-V IP

This task is for simulating a downlink accelerator. To simulate an uplink accelerator replace dl with ul in each directory or file name.
  1. Open the ModelSim 10.6d FPGA Edition simulator.
  2. Change the directory to src\ip\dl_fec_wrapper_top_tb\dl_fec_wrapper_top_tb\sim\mentor
  3. Change the QUARTUS_INSTALL_DIR into your Intel Quartus Prime directory in the msim_setup.tcl file, which is in \sim\mentor directory
  4. Enter the command do load_sim.tcl command in transcript window.
    This command generates the library files and compiles and simulates the source files in the msim_setup.tcl file. The test vectors are in filename_update.sv in the \sim directory.
    Figure 2. The filename update File Structure
    • Corresponding test vector files are in sim\mentor\test_vectors
    • Log.txt contains the result of every test packets.
    • For the downlink accelerator, encoder_pass_file.txt contains the pass report of every index of test packets and encoder_file_error.txt contains the fail report of every index of test packets.
    • For the uplink accelerator, Error_file.txt contains the fail report of every index of test packets.
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