F-Tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 7/08/2024
Public
Document Table of Contents

2.3.1. FHT PMA Architecture

The FHT PMA supports the following parallel data widths.

Table 13.  FHT PMA Data Widths
PMA Width Modulation Supported Data Rates
32 NRZ

24 - 29 Gbps

64 NRZ and PAM4 48 - 58 Gbps
128 PAM4 96 - 116 Gbps
Figure 41. FHT PMA Block DiagramLegend:
  • analog-to-digital converter (ADC)
  • clock data recovery (CDR)
  • continuous time-linear equalization (CTLE)
  • decision feedback equalization (DFE)
  • digital-to-analog converter (DAC)
  • feed forward equalization (FFE)
  • phase generator (PhG)
  • serial-in, parallel-out (SIPO)
  • transmitter buffer (TX Buffer)
  • transmitter equalizer (TX EQ)
  • voltage gain amplifier (VGA)