F-Tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 7/08/2024
Public
Document Table of Contents

2.1. F-Tile Building Blocks

Figure 1. F-Tile High-Level Block Diagram
Figure 2. F-Tile Architecture Building Blocks
Note: If your design requires use of the 200G hard IP block, use Agilex™ 7 production devices with OPNs with the "C" suffix. If you are using Agilex™ 7 production devices with OPNs that have no suffix (blank) or "B" suffix, and your design includes the 200G hard IP block, please contact the Intel customer support team for additional information.

F-tile architecture building blocks include:

  • PMAs
    • FGT
    • FHT
  • Hard IPs
    • 400G hard IP
    • 200G hard IP
    • PCIe* hard IP
  • EMIB
  • IEEE 1588 precision time protocol for Ethernet
  • Clock networks
    • Reference clock network
    • Datapath clock network