F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 1/25/2023
Public

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3.2.1. Preset IP Parameter Settings

The IP parameter editor provides preset settings for the F-Tile PMA/FEC Direct PHY Intel® FPGA IP. You can specify the preset settings as a starting point for your design.

To apply preset parameters, double-click the preset name, and click Apply. For example, selecting the FGT_NRZ_50G_2_PMA_Lanes_Custom_Cadence_ED preset enables all parameters and ports that the PMA Direct mode requires, with two FGT PMA operating at 25.78125Gbps.

Specifying a preset removes any existing parameter values for the IP in the parameter editor. Selecting preset parameters does not prevent changing any parameter value to meet the requirements of your design.

Table 26.   F-Tile PMA/FEC Direct PHY Intel® FPGA IP Available Parameter Presets
PMA / FEC Direct Mode Preset Link Fracture Type PMA Data Rates
FGT_NRZ_128GFC_4_PMA_Lanes_RSFEC_528_514 128 Gbps FEC Direct FGT NRZ Link 4 st_x1 fractures 4 PMA Lanes of 25.78125 Gbps
FGT_NRZ_150G_6_PMA_Lanes_System_PLL 150 Gbps PMA Direct FGT NRZ Link 6 st_x1 fractures 6 PMA Lanes of 25.78125 Gbps
FGT_NRZ_200G_8_PMA_Lanes_RSFEC_528_514 200 Gbps FEC Direct FGT link 8 st_x1 fractures 8 PMA lanes of 25.78125 Gbps
FGT_NRZ_25G_1_PMA_Lane_PMA_Clocking 25 Gbps PMA Direct FGT NRZ Link 1 st_x1 fracture 1 PMA Lane of 25.78125 Gbps
FGT_NRZ_50G_2_PMA_Lanes_System_PLL 50 Gbps PMA Direct FGT NRZ Link 2 st_x1 fractures 2 PMA Lanes of 25.78125 Gbps
FGT_PAM4_100G_2_PMA_Lanes_System_PLL 100 Gbps PMA Direct FGT PAM4 Link 2 st_x2 fractures 2 PMA Lanes of 53.125 Gbps
FHT_PAM4_100G_2_PMA_Lanes_RSFEC_544_514 100 Gbps FEC Direct FHT PAM4 Link 2 st_x2 fractures 2 PMA Lanes of 53.125 Gbps
FHT_PAM4_400G_4_PMA_Lanes_System_PLL 400Gbps PMA Direct FHT PAM4 Link 4 st_x4 fractures 4 PMA Lanes of 106.25 Gbps
FHT_PAM4_400G_4_PMA_lanes_RSFEC_544_514_ED 21 400 Gbps FEC Direct FHT PAM4 link 4 st_x4 fractures 4 PMA Lanes of 106.25 Gbps
FGT_NRZ_50G_2_PMA_lanes_RSFEC_528_514_ED 21 50 Gbps FEC Direct FGT NRZ Link 2 st_x1 fractures 2 PMA Lanes of 25.78125 Gbps
FHT_NRZ_25G_1_PMA_lane_RSFEC_272_258_ED 21 25 Gbps FEC Direct FGT NRZ Link 1 st_x1 Fracture 1 PMA Lane for 25.78125 Gbps
FGT_NRZ_50G_2_PMA_Lanes_Custom_Cadence_ED 21 50 Gbps PMA Direct FGT NRZ link 2 st_x1 Fracture 2 PMA Lanes for 25.78125 Gbps
Note: Refer to F-Tile Building Blocks for fracture type descriptions.
Figure 58. Available Parameter Presets In Parameter Editor
21 Support for example design generation.