Visible to Intel only — GUID: bhc1423797281116
Ixiasoft
Visible to Intel only — GUID: bhc1423797281116
Ixiasoft
1.11. Customize the C code
You can customize the behavior of the C code via a set of user parameters found in the main.h header file.
Parameter |
Description |
---|---|
DEBUG_MODE |
Set to 1 to print debug messages, else set to 0. |
PRINT_INTERRUPT_MESSAGES |
Set to 1 to print JESD204B error interrupt messages, else set to 0. |
CONFIG_SPI |
Set to 1 to configure external converters via SPI interface at start of main.c execution, else set to 0. |
PATCHK_EN |
Set to 1 when test pattern checker is included in the initial design configuration, else set to 0. |
ALTERA_TRANSPORT_LAYER |
Set to 1 when using Altera transport layer, else set to 0. |
BONDED |
Set to 1 when transceivers configured in bonded mode, set to 0 when transceivers configured in unbonded mode.
Note: Serial data rate reconfiguration is only supported in unbonded mode (BONDED=0).
|
DATAPATH |
Set to indicate JESD204B IP configuration: 1 – TX datapath only 2 – RX datapath only 3 – Duplex datapath (TX and RX datapath) |
DATA_RATE_LINK_n |
Set to indicate the initially configured serial data rate of link n in Mbps (for example, to set link 0 to 6144 Mbps, DATA_RATE_LINK_0=6144). For multi-link scenarios, add additional DATA_RATE_LINK_n parameters to the DR_init[] array in main.c. |
DATA_RATE_MIN |
Set to indicate the minimum serial data rate (in Mbps) supported by the JESD204B IP core for the following device families:
|
MAX_LINKS |
Set to indicate the number of links in the design (for example, for dual link, set MAX_LINKS=2)
Note: When using the design as-is, the maximum value of MAX_LINKS is 16. To increase the limit, redesign the address map in QSYS.
|
LINE_BUFFER |
Sets the maximum number of characters that user can enter on command line. |
MAX_NUM_OPTIONS |
Sets the maximum number of options per command. |
MAX_OPTIONS_CHAR |
Sets the maximum number of characters per command option |
XCVR_CFG_FILES_PER_LINK |
Sets the maximum number of transceiver configuration files per link. |
XCVR_PLL_PER_LINK |
Sets the maximum number of transceiver TX PLLs (ATX PLL) per link. Current address map supports up to four PLLs. Refer to the Arria 10 Transceiver PHY User Guide for more details on the maximum number of TX transceiver PLLs required.
Note: When using the design as-is, the maximum value of XCVR_PLL_PER_LINK is 4. To increase the limit, redesign the address map in QSYS.
|
F1_FRAMECLK_DIV |
Set to the F1_FRAMECLK_DIV parameter as defined in the top level HDL file (jesd204b_ed.sv). |
F2_FRAMECLK_DIV |
Set to the F2_FRAMECLK_DIV parameter as defined in the top level HDL file (jesd204b_ed.sv). |
You can further customize the software behavior by directly modifying the C code. A full description of the functions and macros used in the design is given at the end of this document.