1. HDMI Intel® FPGA IP Quick Reference

HDMI Intel® FPGA IP User Guide

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ID 683798

Date 12/04/2023

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1. HDMI Intel® FPGA IP Quick Reference

Updated for:
Intel® Quartus® Prime Design Suite 23.4
IP Version 19.7.3

The Intel® FPGA High-Definition Multimedia Interface (HDMI) IP provides support for next-generation video display interface technology.

The HDMI Intel® FPGA IP is part of the Intel® FPGA IP Library, which is distributed with the Intel® Quartus® Prime software.

Note: All information in this document refers to the Intel® Quartus® Prime Pro Edition software, unless stated otherwise.

Information		Description
IP Information	Core Features	Conforms to the High-Definition Multimedia Interface (HDMI) Specification versions 1.4, 2.0b, and 2.1 Supports transmitter and receiver on a single device transceiver quad Supports pixel frequency up to 600 MHz for HDMI 2.0 and 1,200 MHz for HDMI 2.1 Supports fixed rate link (FRL) for HDMI 2.1 Supports RGB and YCbCr 444, 422, and 420 color modes Accepts standard H-SYNC, V-SYNC, data enable, RGB video format, and YCbCr video format Supports up to 32 audio channels in 2-channel and 8-channel layouts. Supports 8, 10, 12, or 16 bits per component (bpc) Supports single link Digital Visual Interface (DVI) Supports High Dynamic Range (HDR) InfoFrame insertion and filter through the provided design examples Supports the High-bandwidth Digital Content Protection (HDCP) feature for Intel® Arria® 10 and Intel® Stratix® 10 devices Supports Variable Refresh Rate (VRR) and Auto Low Latency Mode (ALLM) for HDMI 2.1
	Typical Application	Interfaces within a PC and monitor External display connections, including interfaces between a PC and monitor or projector, between a PC and TV, or between a device such as a DVD player and TV display
	Device Family	Supports Intel Agilex® 7 F-Tile, Intel® Stratix® 10 (H-Tile and L-Tile), Intel® Arria® 10, Intel® Cyclone® 10 GX, Arria® V, and Stratix® V FPGA devices Note: HDMI 2.1 with FRL enabled supports only Intel Agilex® 7 F-Tile, Intel® Stratix® 10, and Intel® Arria® 10 devices.
	Design Tools	Intel® Quartus® Prime software for IP design instantiation and compilation Timing Analyzer in the Intel® Quartus® Prime software for timing analysis ModelSim* - Intel® FPGA Edition or ModelSim* - Intel® FPGA Starter Edition, Riviera-PRO* , VCS* MX, and Xcelium* Parallel software for design simulation

Note: The High-bandwidth Digital Content Protection (HDCP) feature is not included in the Intel® Quartus® Prime Pro Edition software. To access the HDCP feature, contact Intel at this HDCP Intel® FPGA IP core page.

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HDMI Intel® FPGA IP User Guide

1. HDMI Intel® FPGA IP Quick Reference