4.1. PMBus* Commands Implementation

AN 896: Multi-Rail Power Sequencer and Monitor Reference Design

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ID 683778

Date 3/15/2024

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4.1. PMBus* Commands Implementation

The design implements different register control and status commands, depending on the functionality level you select in the Sequencer Voltage Monitor component. The commands can address one or two bytes of data. The design stores all data for the output voltage and related parameters in the DIRECT format.

Table 9. Power Sequencer PMBus* Commands DescriptionThis table lists the supported PMBus* commands. The design implements commands marked with * only if you select the Full-featured option for the Functionality Level parameter of the Sequencer Voltage Monitor component.
Command Code (Address)	Bit	Name		SMBus Transaction	Description
`0x00`	[7:0]	PAGE		Read Byte Write Byte	Selects the page of commands for the voltage rail being accessed. Range of valid page values is `0x00` to `0x8F` (143) and relates to each `VOUT` rail.
`0x03`		CLEAR_FAULTS		Send Byte	Clears all warnings and faults in the write-to-clear status bits.
`0x35`	[15:0]	VIN_ON ¹	*	Read Word Write Word	Sets the value of the input voltage at which it is sufficiently high for the design to begin sequencing the output rails on.
`0x36`	[15:0]	VIN_OFF ¹	*	Read Word Write Word	Sets the value of the input voltage at which it has dropped low enough that the design must sequence the output rails off.
`0x40`	[15:0]	VOUT_OV_FAULT_LIMIT ¹	*	Read Word Write Word	Sets the value of the output voltage that causes an output overvoltage fault.
`0x41`	—	VOUT_OV_FAULT_RESP		Read Byte Write Byte	Instructs the device on the action to take when there is an output overvoltage fault.
	[7:6]	Response		—	00—Continue operation without interruption 01—Invalid 10—Sequence a power down in reverse order and respond according to the retry setting in bits [5:3] 11—Invalid
	[5:3]	Retry Setting ²		—	Indicates the number of times the device attempts to restart from a fault. 0—Do not attempt a restart and remain disabled until the fault clears and `ENABLE` input toggles 1 to 6—Retry for the specified number of attempts, then stop and remain disabled until the fault clears and the `ENABLE` input toggles 7—Retry infinitely
	[2:0]	Delay Time ³		—	Specifies the delay interval between attempts to restart. 0—No delay 1 to 7—Use the Delay Time Between Restarts parameter setting in the Power Sequencer component
`0x42`	[15:0]	VOUT_OV_WARN_LIMIT ¹	*	Read Word Write Word	Sets the value of the output voltage that causes an output overvoltage warning.
`0x43`	[15:0]	VOUT_UV_WARN_LIMIT ¹	*	Read Word Write Word	Sets the value of the output voltage that causes an output undervoltage warning.
`0x44`	[15:0]	VOUT_UV_FAULT_LIMIT ¹	*	Read Word Write Word	Sets the value of the output voltage that causes an output undervoltage fault.
`0x45`	—	VOUT_UV_FAULT_RESP		Read Byte Write Byte	Instructs the device on the action to take when there is an output undervoltage fault.
	[7:6]	Response		—	00—Continue operation without interruption 01—Invalid 10—Sequence a power down in reverse order and respond according to the retry setting in bits [5:3] 11—Invalid
	[5:3]	Retry Setting²		—	Indicates the number of times the device attempts to restart from a fault. 0—Do not attempt a restart and remain disabled until the fault clears and `ENABLE` input toggles 1 to 6—Retry for the specified number of attempts, then stop and remain disabled until the fault clears and the `ENABLE` input toggles 7—Retry infinitely
	[2:0]	Delay Time³		—	Specifies the delay interval between attempts to restart. 0—No delay 1 to 7—Use the Delay Time Between Restarts parameter setting in the Power Sequencer component
`0x55`	[15:0]	VIN_OV_FAULT_LIMIT ¹	*	Read Word Write Word	Sets the value of the input voltage that causes an input overvoltage fault.
`0x56`	—	VIN_OV_FAULT_RESP		Read Byte Write Byte	Instructs the device on the action to take when there is an input overvoltage fault.
	[7:6]	Response		—	00—Continue operation without interruption 01—Invalid 10—Sequence a power down in reverse order and respond according to the retry setting in bits [5:3] 11—Invalid
	[5:3]	Retry Setting ²		—	Indicates the number of times the device attempts to restart from a fault. 0—Do not attempt a restart and remain disabled until the fault clears and `ENABLE` input toggles 1 to 6—Retry for the specified number of attempts, then stop and remain disabled until the fault clears and the `ENABLE` input toggles 7—Retry infinitely
	[2:0]	Delay Time ³		—	Specifies the delay interval between attempts to restart. 0—No delay 1 to 7—Use the Delay Time Between Restarts parameter setting in the Power Sequencer component
`0x57`	[15:0]	VIN_OV_WARN_LIMIT ¹	*	Read Word Write Word	Sets the value of the input voltage that causes an input overvoltage warning.
`0x58`	[15:0]	VIN_UV_WARN_LIMIT ¹	*	Read Word Write Word	Sets the value of the input voltage that causes an input undervoltage warning.
`0x59`	[15:0]	VIN_UV_FAULT_LIMIT ¹	*	Read Word Write Word	Sets the value of the input voltage that causes an input undervoltage fault.
`0x5A`	—	VIN_UV_FAULT_RESP		Read Byte Write Byte	Instructs the device on the action to take when there is an input undervoltage fault.
	[7:6]	Response		—	00—Continue operation without interruption 01—Invalid 10—Sequence a power down in reverse order and respond according to the retry setting in bits [5:3] 11—Invalid
	[5:3]	Retry Setting ²		—	Indicates the number of times the device attempts to restart from a fault. 0—Do not attempt a restart and remain disabled until the fault clears and `ENABLE` input toggles 1 to 6—Retry for the specified number of attempts, then stop and remain disabled until the fault clears and the `ENABLE` input toggles 7—Retry infinitely
	[2:0]	Delay Time ³		—	Specifies the delay interval between attempts to restart. 0—No delay 1 to 7—Use the Delay Time Between Restarts parameter setting in the Power Sequencer component
`0x5E`	[15:0]	POWER_GOOD_ON ¹	*	Read Word Write Word	Sets the value of the output voltage at which it is sufficiently high for the design to assert the `POWER_GOOD` signal to the Power Sequencer component, indicating that the output voltage is valid.
`0x5F`	[15:0]	POWER_GOOD_OFF ¹	*	Read Word Write Word	Sets the value of the output voltage at which it has dropped low enough for the design to deassert the `POWER_GOOD` signal to the Power Sequencer component, indicating that the output voltage is not valid.
`0x78`	[7:0]	STATUS_BYTE [7]: BUSY [6]: OFF [5]: VOUT_OV_FAULT [4]: Reserved [3]: VIN_UV_FAULT [2]: Reserved [1]: CML [0]: NONE_OF_THE_ABOVE		Read Byte	A value of `1` for any bit indicates that a fault or warning has occurred in the associated status registers.
`0x79`	[15:0]	STATUS_WORD [15]: VOUT [14]: Reserved [13]: INPUT [12]: MFRSPECIFIC [11]: PG_STATUS# [10]: Reserved [9]: OTHER [8]: UNKNOWN [7]: BUSY [6]: OFF [5]: VOUT_OV_FAULT [4]: Reserved [3]: VIN_UV_FAULT [2]: Reserved [1]: CML [0]: NONE_OF_THE_ABOVE		Read Word	A value of `1` for any bit indicates that a fault or warning has occurred in the associated status registers. Bits [7:0] are duplicate of STATUS_BYTE.
`0x7A`	[7:0]	STATUS_VOUT [7]: VOUT_OV_FAULT [6]: VOUT_OV_Warning [5]: VOUT_UV_Warning [4]: VOUT_UV_FAULT [3]: Reserved [2]: Reserved [1]: Reserved [0]: Reserved		Read Byte Write Byte	A value of `1` for any bit indicates that a fault or warning has occurred and flagged for the various conditions. To clear the flag, write `1` to the particular bit in the register.
`0x7C`	[7:0]	STATUS_INPUT [7]: VIN_OV_FAULT [6]: VIN_OV_Warning [5]: VIN_UV_Warning [4]: VIN_UV_FAULT [3]: Unit Off for Low VIN [2]: Reserved [1]: Reserved [0]: Reserved		Read Byte Write Byte	A value of `1` for any bit indicates that a fault or warning has occurred and flagged for the various conditions. To clear the flag, write `1` to the particular bit in the register.
`0x7E`	[7:0]	STATUS_CML [7]: Invalid/Unsupported Command [6]: Invalid/Unsupported Data [5]: Reserved [4]: Reserved [3]: Reserved [2]: Reserved [1]: Reserved [0]: Reserved		Read Byte Write Byte	A value of `1` for any bit indicates that a fault or warning has occurred and flagged for the various conditions. To clear the flag, write `1` to the particular bit in the register.
`0x7F`	[7:0]	STATUS_OTHER [7]: Reserved [6]: Reserved [5]: Reserved [4]: Reserved [3]: Reserved [2]: Reserved [1]: Reserved [0]: First to Assert SMBALERT#		Read Byte Write Byte	A value of `1` for any bit indicates that a fault or warning has occurred and flagged for the various conditions. To clear the flag, write `1` to the particular bit in the register.
`0x88`	[15:0]	READ_VIN ¹		Read Word	Indicates the present input voltage level.
`0x8B`	[15:0]	READ_VOUT ¹		Read Word	Indicates the present output voltage level.

¹ The levels are specified in the PMBus* DIRECT format. For information about translating to and from the DIRECT format, refer to the related information.

² The Retry Setting value is common across all pages, and warnings or faults. The controller attempts to recover after a fault until it reaches the global number of times to retry. The retry counter resets whenever the ENABLE input toggles low. The Response setting for this same command is unique to each warning or fault.

³ The Delay Time setting is common across all pages, and warnings or faults. After all power good signals deasserts, the controller waits between retry attempts for the specified time before power sequencing the rails back up. The Response setting for this same command is unique to each warning or fault.

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AN 896: Multi-Rail Power Sequencer and Monitor Reference Design

4.1. PMBus* Commands Implementation