Visible to Intel only — GUID: nik1410905525376
Ixiasoft
Visible to Intel only — GUID: nik1410905525376
Ixiasoft
5.4. BAR Hit Signals
The IP core contains logic that determines which BAR corresponds to a particular TLP for the following types of transactions: memory reads, memory writes and Atomic Ops. This information is sent out via the rx_st_bar_range[2:0] outputs. User application logic can leverage this information to know what BAR the transactions going across the Avalon-ST RX interface are targeting.
Signal | Direction | Description |
---|---|---|
rx_st_bar_range[2:0] | output | These outputs identify the matching BAR for the TLP on the Avalon-ST RX interface. They are valid for MRd, MWr and Atomic Op TLPs . These outputs should be ignored for all other TLPs. They are valid in the first cycle of a TLP, when rx_st_valid and rx_st_sop are asserted. The following BAR numbers are defined:
|
rx_st_pf_num[2:0] | output | Identifies the Function targeted by the TLP on the Avalon-ST RX interface. This output is valid for memory requests, Completions, and messages routed by ID. When the targeted Function is a VF, this output provides the PF Number to which the VF is attached. |
rx_st_vf_active | output | Indicates that the Function targeted by the TLP is a Virtual Function. When this output is asserted, the VF number offset of the VF is provided on rx_st_vf_num. This output is valid for memory requests, Completions, and messages routed by ID. |
rx_st_vf_num[11:0] | output | When rx_st_vf_active is high, this output identifies the VF number offset of the VF targeted by the TLP on the Avalon-ST RX interface. This output is valid for memory requests, Completions, and messages routed by ID. Its value ranges from 0-(<n>-1), where <n> is the number of VFs associated with a PF. |