Differences Among Intel SoC Device Families

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ID 683648
Date 8/22/2018
Public
Document Table of Contents
Document Table of Contents x
Differences Among Intel SoC Device Families
Differences Among Intel SoC Device Families x
Overview of HPS Modules HPS MPU Subsystem Differences Stratix 10 HPS Interface to SDM Booting and Configuration Differences HPS Cache Coherency Controller Differences HPS System Memory Management Differences HPS On-Chip RAM Differences HPS Error Correction Differences HPS DMA Controller Differences HPS Clock Manager Differences HPS Reset Manager Differences HPS FPGA Manager Differences HPS System Manager Differences HPS Scan Manager Differences HPS Security Feature Differences HPS Interconnect Differences HPS-FPGA Bridge Differences HPS General Purpose I/O Interface Differences HPS I/O Configuration Differences HPS SDRAM Controller Subsystem Differences HPS NAND Flash Controller Differences HPS SD/MMC Controller Differences HPS Quad SPI Flash Controller Differences HPS USB 2.0 OTG Controller Differences HPS EMAC Differences HPS SPI Controller Differences HPS I2C Controller Differences HPS UART Controller Differences HPS CAN Controller Differences HPS Timer Differences HPS Watchdog Timer Differences HPS CoreSight Debug and Trace Differences Document Revision History
Differences Among Intel SoC Device Families

HPS Reset Manager Differences

Reset Manager Feature Cyclone V SoC Arria V SoC Arria 10 SoC Stratix 10 SoC
Cold Reset Sources
  • POR 12 monitor
  • nPOR pin
  • FPGA fabric
  • FPGA CB 13 and scan manager
  • Software cold reset request
  • POR monitor
  • nPOR pin
  • FPGA fabric
  • FPGA CB and scan manager
  • Software cold reset request
  • Security manager
  • nPOR pin
  • FPGA fabric
  • FPGA CB
  • Software cold reset request
  • SDM
  • HPS cold reset pin 14
  • HPS software cold reset request
Warm reset sources
  • nRST pin
  • FPGA fabric
  • Software warm reset request
  • MPU watchdogs
  • System watchdogs
  • nRST pin
  • FPGA fabric
  • Software warm reset request
  • MPU watchdogs
  • System watchdogs
  • nRST pin
  • FPGA fabric
  • Software warm reset request
  • MPU watchdogs
  • System watchdogs
  • SDM
  • FSBL 15 or software warm reset request
  • System watchdogs
Debug reset resources
  • DAP 16 reset
  • FPGA fabric
  • DAP reset
  • FPGA fabric
  • DAP reset
  • FPGA fabric
 DAP reset
RAM-clearing reset No No Yes Handled by SDM
Anti-tamper reset No No Yes Handled by SDM
12 Power-on reset
13 Control block
14 One of the dedicated SDM I/Os can be configured to work as an HPS cold reset pin
15 First-stage boot loader
16 Debug access port
Level Two Title