Differences Among Intel SoC Device Families

Download PDF
ID 683648
Date 8/22/2018
Public
Document Table of Contents
Document Table of Contents x
Differences Among Intel SoC Device Families
Differences Among Intel SoC Device Families x
Overview of HPS Modules HPS MPU Subsystem Differences Stratix 10 HPS Interface to SDM Booting and Configuration Differences HPS Cache Coherency Controller Differences HPS System Memory Management Differences HPS On-Chip RAM Differences HPS Error Correction Differences HPS DMA Controller Differences HPS Clock Manager Differences HPS Reset Manager Differences HPS FPGA Manager Differences HPS System Manager Differences HPS Scan Manager Differences HPS Security Feature Differences HPS Interconnect Differences HPS-FPGA Bridge Differences HPS General Purpose I/O Interface Differences HPS I/O Configuration Differences HPS SDRAM Controller Subsystem Differences HPS NAND Flash Controller Differences HPS SD/MMC Controller Differences HPS Quad SPI Flash Controller Differences HPS USB 2.0 OTG Controller Differences HPS EMAC Differences HPS SPI Controller Differences HPS I2C Controller Differences HPS UART Controller Differences HPS CAN Controller Differences HPS Timer Differences HPS Watchdog Timer Differences HPS CoreSight Debug and Trace Differences Document Revision History
Differences Among Intel SoC Device Families

Differences Among Intel SoC Device Families

This document lists the differences among hard processor systems (HPSs) in Intel's SoC device families.

There are several families of Intel® SoC devices:

  • Altera® Cyclone® V SoC
  • Altera® Arria® V SoC
  • Intel® Arria® 10 SoC
  • Intel® Stratix® 10 SoC

This document briefly lists the differences among these device families. For complete descriptions and explanations of device family features, refer to the handbook for each device family.

Note: The information in this document regarding the Stratix® 10 SoC devices is preliminary and subject to change.

Section Content
Overview of HPS Modules
HPS MPU Subsystem Differences
Stratix 10 HPS Interface to SDM
Booting and Configuration Differences
HPS Cache Coherency Controller Differences
HPS System Memory Management Differences
HPS On-Chip RAM Differences
HPS Error Correction Differences
HPS DMA Controller Differences
HPS Clock Manager Differences
HPS Reset Manager Differences
HPS FPGA Manager Differences
HPS System Manager Differences
HPS Scan Manager Differences
HPS Security Feature Differences
HPS Interconnect Differences
HPS-FPGA Bridge Differences
HPS General Purpose I/O Interface Differences
HPS I/O Configuration Differences
HPS SDRAM Controller Subsystem Differences
HPS NAND Flash Controller Differences
HPS SD/MMC Controller Differences
HPS Quad SPI Flash Controller Differences
HPS USB 2.0 OTG Controller Differences
HPS EMAC Differences
HPS SPI Controller Differences
HPS I2C Controller Differences
HPS UART Controller Differences
HPS CAN Controller Differences
HPS Timer Differences
HPS Watchdog Timer Differences
HPS CoreSight Debug and Trace Differences
Document Revision History

Related Information
Level Two Title