Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 4/03/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.1.7. AXI Timeout Bridge Intel® FPGA IP

The AXI Timeout Bridge Intel® FPGA IP allows your system to recover when it freezes, and facilitates debugging. You can place an AXI Timeout Bridge between a single manager and a single subordinate if you know that the subordinate may time out and cause your system to freeze. If a subordinate does not accept a command or respond to a command it accepted, its manager can wait indefinitely.

For a domain with multiple managers and subordinates, placement of an AXI Timeout Bridge in your design may be beneficial in the following scenarios:

  • To recover from a freeze, place the bridge near the subordinate. If the manager attempts to communicate with a subordinate that freezes, the AXI Timeout Bridge frees the manager by generating error responses. The manager is then able to communicate with another subordinate.
  • When debugging your system, place the AXI Timeout Bridge near the manager. This placement enables you to identify the origin of the burst, and to obtain the full address from the manager. Additionally, placing an AXI Timeout Bridge near the manager enables you to identify the target subordinate for the burst.
    Note: If you place the bridge at the subordinate's side and you have multiple subordinates connected to the same manager, you do not get the full address.
Figure 243. AXI Timeout Bridge Placement