E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 4/10/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.12.2.7. TX Datapath Ready

Offset: 0x322

TX Datapath Ready Fields

Bit Name Description Access Reset
0 tx_pcs_ready TX Ready

1: TX Datapath is out of reset, stable, and ready for use.

RO 0x0