E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 4/10/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.7.4.1. One 24.33024 Gbps channel with RS-FEC

You can place the channel to first_lane0, or first_lane1, or first_lane2 or first_lane3.
Note: The parameter options first_lane0 refers to ch0, first_lane1 refers to ch1, first_lane2 refers to ch2, and first_lane3 refers to ch3 in all the figures throughout this document.
Figure 79. One 24.33024 Gbps Channel with RS-FEC