Intel® FPGA Power and Thermal Calculator User Guide

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ID 683445
Date 3/28/2022
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Document Table of Contents
Document Table of Contents x
1. Overview of the Intel® FPGA Power and Thermal Calculator 2. Setting Up the Intel® FPGA Power and Thermal Calculator 3. Intel® FPGA Power and Thermal Calculator Graphical User Interface 4. Intel® FPGA Power and Thermal Calculator Pages 5. Factors Affecting the Accuracy of the Intel® FPGA Power and Thermal Calculator 6. Intel® FPGA Power and Thermal Calculator User Guide Archive 7. Document Revision History for the Intel® FPGA Power and Thermal Calculator User Guide A. Measuring Static Power
1. Overview of the Intel® FPGA Power and Thermal Calculator x
1.1. Intel® FPGA PTC Power Model Status 1.2. Definitions of Power Terms Used in this Document
2. Setting Up the Intel® FPGA Power and Thermal Calculator x
2.1. Availability 2.2. Obtaining the Standalone Intel® FPGA Power and Thermal Calculator 2.3. Estimating Power Consumption with the Intel® FPGA Power and Thermal Calculator 2.4. Power Analysis for Dual-Core 1SG10M Intel® Stratix® 10 Devices
2.3. Estimating Power Consumption with the Intel® FPGA Power and Thermal Calculator x
2.3.1. Estimating Power Consumption Before Starting the FPGA Design 2.3.2. Estimating Power Consumption While Creating the FPGA Design 2.3.3. Estimating Power Consumption After Completing the FPGA Design
3. Intel® FPGA Power and Thermal Calculator Graphical User Interface x
3.1. Intel® FPGA PTC Select Family Dialog Box 3.2. Intel® FPGA PTC Basic GUI Components
3.2. Intel® FPGA PTC Basic GUI Components x
3.2.1. Intel® FPGA PTC Data Entry Pages 3.2.2. Intel® FPGA PTC Field Types 3.2.3. Intel® FPGA PTC Input Field Dependencies 3.2.4. Intel® FPGA PTC Data Entry Error Messages
4. Intel® FPGA Power and Thermal Calculator Pages x
4.1. Intel® FPGA PTC - Power Summary 4.2. Intel® FPGA PTC - Common Page Elements 4.3. Intel® FPGA PTC - Device Selection and Thermal Analysis Windows 4.4. Intel® FPGA PTC - Main Page 4.5. Intel® FPGA PTC - Logic Page 4.6. Intel® FPGA PTC - RAM Page 4.7. Intel® FPGA PTC - DSP Page 4.8. Intel® FPGA PTC - Clock Page 4.9. Intel® FPGA PTC - PLL Page 4.10. Intel® FPGA PTC - I/O Page 4.11. Intel® FPGA PTC - I/O-IP Page 4.12. Intel® FPGA PTC - Transceiver Page 4.13. Intel® FPGA PTC - HPS Page 4.14. Intel® FPGA PTC - Crypto Page ( Intel® Agilex™ Devices with Crypto Blocks Only) 4.15. Intel® FPGA PTC - HBM Page ( Intel® Stratix® 10 Devices Only) 4.16. Intel® FPGA PTC - Thermal Page 4.17. Intel® FPGA PTC - Report Page
4.12. Intel® FPGA PTC - Transceiver Page x
4.12.1. Estimating E-Tile Channel PLL Power with the Intel Power and Thermal Calculator
5. Factors Affecting the Accuracy of the Intel® FPGA Power and Thermal Calculator x
5.1. Toggle Rate 5.2. I/O Bank Allocation
1. Overview of the Intel® FPGA Power and Thermal Calculator
2. Setting Up the Intel® FPGA Power and Thermal Calculator
3. Intel® FPGA Power and Thermal Calculator Graphical User Interface
4. Intel® FPGA Power and Thermal Calculator Pages
5. Factors Affecting the Accuracy of the Intel® FPGA Power and Thermal Calculator
6. Intel® FPGA Power and Thermal Calculator User Guide Archive
7. Document Revision History for the Intel® FPGA Power and Thermal Calculator User Guide
A. Measuring Static Power

4.17. Intel® FPGA PTC - Report Page

The Report page shows per-rail currents calculated by the Intel® FPGA Power and Thermal Calculator ( Intel® FPGA PTC).
Figure 27. Report Page of the Intel® FPGA PTC

The Report page provides current requirements for each voltage rail, expressed in terms of static current, dynamic current, and total current.

There is a minor difference in the format of the Report page between Intel® Agilex™ and Intel® Stratix® 10 devices:

  • For Intel® Agilex™ devices, every row displayed in the Report table represents a corresponding voltage rail.
  • For Intel® Stratix® 10 devices, different sections of the table are preceded by an empty row. For example, an empty VCC row introduces the VCC section of the table, an empty VCCIO row introduces the VCCIO section, and so forth.
Table 32.  Current and Power Regulator Requirements Per Voltage Rail
Column Heading Description
Rail Name of the voltage rail.
Voltage (mV) Rail voltage.
Static Current (A) Indicates the component of current consumed from the specified power rail whenever the power is applied to the rail, independent of circuit activity (in A). This current is dependent on device size, device grade, power characteristics and junction temperature.
Standby Current (A) Indicates the component of active current drawn from the specified power rail by all modules on all pages, independent of signal activity (in A). This current is independent of device grade, power characteristics and junction temperature. Standby current includes, but is not limited to, I/O and transceiver DC bias current. Device size has only a small impact on transceiver DC bias current. (This column applies only to Intel® Stratix® 10 devices.)
Dynamic Current (A) Indicates the component of active current drawn from the specified power rail due to signal activity of all modules on all pages (in A). This current depends on device size, but is independent of device grade, power characteristics and junction temperature.
SmartVID Current Savings (A) Indicates the total current saved from the specified power rail due to SmartVID savings (in A). (This column applies only to Intel® Agilex™ devices.)
Total Current Before SmartVID Savings (A) Indicates the total current consumed from the specified power rail before SmartVID savings (in A). The sum of static, standby, and dynamic currents. (This column applies only to Intel® Stratix® 10 devices.)
Total Current (A) Indicates the total current consumed from the specified power rail (in A). For devices and rails supporting SmartVID, this column shows total current after SmartVID current savings; otherwise, the current reported in this column should equal the sum of static and dynamic currents (for Intel® Agilex™ devices, or the sum of static, standby, and dynamic currents (for Intel® Stratix® 10 devices).
Recommended Margin Indicates the recommended margin on total current for regulator sizing. The recommended margin on the Vcc rail is calculated based on the ratio of dynamic to static power.
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