Intel® FPGA Power and Thermal Calculator User Guide

Download PDF
ID 683445
Date 3/28/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents
Document Table of Contents x
1. Overview of the Intel® FPGA Power and Thermal Calculator 2. Setting Up the Intel® FPGA Power and Thermal Calculator 3. Intel® FPGA Power and Thermal Calculator Graphical User Interface 4. Intel® FPGA Power and Thermal Calculator Pages 5. Factors Affecting the Accuracy of the Intel® FPGA Power and Thermal Calculator 6. Intel® FPGA Power and Thermal Calculator User Guide Archive 7. Document Revision History for the Intel® FPGA Power and Thermal Calculator User Guide A. Measuring Static Power
1. Overview of the Intel® FPGA Power and Thermal Calculator x
1.1. Intel® FPGA PTC Power Model Status 1.2. Definitions of Power Terms Used in this Document
2. Setting Up the Intel® FPGA Power and Thermal Calculator x
2.1. Availability 2.2. Obtaining the Standalone Intel® FPGA Power and Thermal Calculator 2.3. Estimating Power Consumption with the Intel® FPGA Power and Thermal Calculator 2.4. Power Analysis for Dual-Core 1SG10M Intel® Stratix® 10 Devices
2.3. Estimating Power Consumption with the Intel® FPGA Power and Thermal Calculator x
2.3.1. Estimating Power Consumption Before Starting the FPGA Design 2.3.2. Estimating Power Consumption While Creating the FPGA Design 2.3.3. Estimating Power Consumption After Completing the FPGA Design
3. Intel® FPGA Power and Thermal Calculator Graphical User Interface x
3.1. Intel® FPGA PTC Select Family Dialog Box 3.2. Intel® FPGA PTC Basic GUI Components
3.2. Intel® FPGA PTC Basic GUI Components x
3.2.1. Intel® FPGA PTC Data Entry Pages 3.2.2. Intel® FPGA PTC Field Types 3.2.3. Intel® FPGA PTC Input Field Dependencies 3.2.4. Intel® FPGA PTC Data Entry Error Messages
4. Intel® FPGA Power and Thermal Calculator Pages x
4.1. Intel® FPGA PTC - Power Summary 4.2. Intel® FPGA PTC - Common Page Elements 4.3. Intel® FPGA PTC - Device Selection and Thermal Analysis Windows 4.4. Intel® FPGA PTC - Main Page 4.5. Intel® FPGA PTC - Logic Page 4.6. Intel® FPGA PTC - RAM Page 4.7. Intel® FPGA PTC - DSP Page 4.8. Intel® FPGA PTC - Clock Page 4.9. Intel® FPGA PTC - PLL Page 4.10. Intel® FPGA PTC - I/O Page 4.11. Intel® FPGA PTC - I/O-IP Page 4.12. Intel® FPGA PTC - Transceiver Page 4.13. Intel® FPGA PTC - HPS Page 4.14. Intel® FPGA PTC - Crypto Page ( Intel® Agilex™ Devices with Crypto Blocks Only) 4.15. Intel® FPGA PTC - HBM Page ( Intel® Stratix® 10 Devices Only) 4.16. Intel® FPGA PTC - Thermal Page 4.17. Intel® FPGA PTC - Report Page
4.12. Intel® FPGA PTC - Transceiver Page x
4.12.1. Estimating E-Tile Channel PLL Power with the Intel Power and Thermal Calculator
5. Factors Affecting the Accuracy of the Intel® FPGA Power and Thermal Calculator x
5.1. Toggle Rate 5.2. I/O Bank Allocation
1. Overview of the Intel® FPGA Power and Thermal Calculator
2. Setting Up the Intel® FPGA Power and Thermal Calculator
3. Intel® FPGA Power and Thermal Calculator Graphical User Interface
4. Intel® FPGA Power and Thermal Calculator Pages
5. Factors Affecting the Accuracy of the Intel® FPGA Power and Thermal Calculator
6. Intel® FPGA Power and Thermal Calculator User Guide Archive
7. Document Revision History for the Intel® FPGA Power and Thermal Calculator User Guide
A. Measuring Static Power

3.2.1. Intel® FPGA PTC Data Entry Pages

The look and feel of the Intel® FPGA Power and Thermal Calculator ( Intel® FPGA PTC) is the same whether you are using the standalone version or the version integrated within the Intel® Quartus® Prime software. There are, however, differences depending on whether you are targeting Intel® Agilex™ or Intel® Stratix® 10 devices.

The following are the pages within the Intel® FPGA PTC:

  • The Main page allows you to enter device, package, and cooling information, and displays thermal analysis information pertaining to constant junction temperatures.
  • The Logic page allows you to enter logic resources for all modules in your design.
  • The RAM page represents design modules using RAM blocks. Among other information, enter RAM type, data width, RAM depth (if applicable), RAM mode, and port parameters.
  • The DSP page represents DSP design modules. Among other information, enter DSP configuration, clock frequency, toggle percentage, and register usage.
  • The Clock page represents clock networks of separate clock domains.
  • The PLL page represents one or more PLLs in the device.
  • The I/O page represents design modules using general-purpose I/O pins. This page does not apply to transceiver I/O pins. Among other information, enter I/O standard, input termination, current strength or output termination, data rate, clock frequency, output enable static probability, and capacitive load.
  • The I/O-IP page represents design modules using complex I/O IP, such as DDR.
  • The Transceiver page allows you to enter transceiver resources and their settings for all modules in your design.
  • The HPS page applies to devices with HPS.
  • The Crypto page allows you to enter crypto resources and their settings for all modules in your design ( Intel® Agilex™ devices with crypto blocks only).
  • The HBM page ( Intel® Stratix® 10 devices only).
  • The Thermal page allows you to enter temperature requirements for your design and displays thermal power and thermal analysis information.
  • The Report page shows per-rail currents calculated by the Intel® FPGA Power and Thermal Calculator (PTC).
Level Two Title