Visible to Intel only — GUID: txg1599544304905
Ixiasoft
Visible to Intel only — GUID: txg1599544304905
Ixiasoft
2.9. 'X' Propagation Support in Simulation
The embedded memory simulation model in the Quartus® Prime Pro Edition software supports "X" propagation in simulation for Stratix® 10 devices. When you drive any input signals with a non-deterministic value ("X"), the memory content and/or output could result to an "X" value. For example, if the write address is "X", the whole memory content is written with "X" (i.e., "X" acts as memory corruption) because the address to which the data content is written is unknown. This feature is applicable to the RAM and ROM operating modes.
- RAM: 1-Port Intel® FPGA IP
- RAM: 2-Port Intel® FPGA IP
- RAM: 4-Port Intel® FPGA IP
- ROM: 1-Port Intel® FPGA IP
- ROM: 2-Port Intel® FPGA IP
- Shift Register (RAM-based) Intel® FPGA IP
To enable this feature, you must include the ENA_INPUT_X_PROP define flag in the simulation command when compiling the embedded memory simulation model and when running the simulation.
vlog -sv -timescale 1ps/1ps +define+ENA_INPUT_X_PROP -work msim_precompile $env(QUARTUS_DIR)/eda/sim_lib/altera_lnsim.sv
The following figures show examples of the "X" propagation when write enable is "X".