Stratix® 10 Embedded Memory User Guide

ID 683423
Date 7/08/2024
Public
Document Table of Contents

2.6. Coherent Read Memory

The coherent read memory feature allows you to read out the output data that will be written into the same memory content in a single clock cycle. In other words, you will experience the new data (flow through) behavior during the read-during-write operation. This feature is applicable only for M20K blocks and supported only in single clock configuration.

If you engage the coherent read memory feature, you cannot use the following configurations:
  • Operating modes other than simple dual-port
  • Simple dual-port with different port width
  • Byte enable
  • ECC
  • Simple dual-port with more than 20-bit wide data
  • Dual clock configuration
Figure 8. Simplified Block Diagram of Coherent Read Memory Circuitry
Figure 9. Coherent Read Memory Behavior for Unregistered OutputThis figure shows the waveform of the coherent read memory when the output is unregistered.
Figure 10. Coherent Read Memory Behavior for Registered OutputThis figure shows the waveform of the coherent read memory when the output is registered.