Visible to Intel only — GUID: ily1496439877019
Ixiasoft
1.2.1. Automatic Lane Polarity Inversion for PCIe Hard IP
1.2.2. Link Equalization Request Bit in the PCIe Hard IP Cannot Be Cleared by Software
1.2.3. High VCCBAT Current when VCC is Powered Down
1.2.4. Failure on Row Y59 When Using the Error Detection Cyclic Redundancy Check (EDCRC) or Partial Reconfiguration (PR)
1.2.5. GPIO Output may not meet the On-Chip Series Termination (Rs OCT) without Calibration Resistance Tolerance Specification or Current Strength Expectation
Visible to Intel only — GUID: ily1496439877019
Ixiasoft
1.1. Design Recommendations for Intel® Arria® 10 GX/GT Devices
The following section describes recommendations you should follow when using Intel® Arria® 10 GX/GT devices.