Mailbox Client Intel® FPGA IP User Guide

Download PDF
ID 683290
Date 4/04/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents
Document Table of Contents x
1. Mailbox Client Intel FPGA IP User Guide 2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions
1. Mailbox Client Intel FPGA IP User Guide x
1.1. Device Family Support 1.2. Parameters 1.3. Mailbox Client Intel FPGA Core Interface Signals 1.4. Mailbox Client Intel FPGA IP Avalon® MM Memory Map 1.5. Commands and Responses 1.6. Specifying the Command and Response FIFO Depths 1.7. Enabling Cryptographic Services 1.8. Using the Mailbox Client Intel FPGA IP 1.9. Mailbox Client Intel FPGA IP Core Use Case Examples 1.10. Nios® II HAL Driver 1.11. Mailbox Client Intel FPGA IP User Guide Archives 1.12. Document Revision History for the Mailbox Client Intel FPGA IP User Guide
1.3. Mailbox Client Intel FPGA Core Interface Signals x
1.3.1. Clock and Reset Interfaces 1.3.2. Avalon® Memory-Mapped Interface 1.3.3. AXI Manager Interface
1.4. Mailbox Client Intel FPGA IP Avalon® MM Memory Map x
1.4.1. Interrupt Enable Register 1.4.2. Interrupt Status Register 1.4.3. Timer Registers
1.5. Commands and Responses x
1.5.1. Operation Commands 1.5.2. Error Code Responses 1.5.3. Error Code Recovery
1.10. Nios® II HAL Driver x
1.10.1. Driver API
1. Mailbox Client Intel FPGA IP User Guide
2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions

1.10. Nios® II HAL Driver

This section describes the HAL driver for the Mailbox Client Intel® FPGA IP core. Intel provides HAL system library drivers that enable you to perform Mailbox Client operations using the HAL API functions. The operations along with their descriptions are listed in Table 11. In addition, the HAL driver also provides exclusive functions on QSPI flash device-related operations to simplify your design flow.

The HAL API is available for this controller in the following software files:
  • altera_s10_mailbox_client.h
  • altera_s10_mailbox_client.c
  • altera_s10_mailbox_client_flash.h
  • altera_s10_mailbox_client_flash.c
These files implement the Mailbox Client core device driver for the HAL system library.

To use the HAL API, enable altera_safeclib in the BSP Software Package from BSP Editor. Enter mailbox_client_open() function to start the HAL API. Note that the interrupt connection to the processor is necessary to use the HAL API.

The absolute addressing to the quad SPI memory specifies all the offset-related variables. You must complete the quad SPI operation by calling mailbox_client_flash_open() before any flash operation, and mailbox_client_flash_close() at the end of any flash operation.

Related Information
Level Two Title