AN 875: Intel® Stratix® 10 E-Tile PCB Design Guidelines
ID
683262
Date
3/12/2019
Public
Visible to Intel only — GUID: wzf1533339977229
Ixiasoft
2.3. PCB Design Flow
The following figure shows the Signal Integrity work flow in a platform design. Some adjustments may be necessary if PCB simulations fail or do not reach the desired targets.
Figure 5. Signal Integrity Work Flow in Platform Design
