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Ixiasoft
2.3.2.1. Insertion Loss
You must estimate the differential trace insertion loss in dB/inch for the trace loss budget based on the selected PCB materials and stackup. To optimize the PCB trace impedance and stackup, you must follow the key notes below:
If thin dielectric layers with high dielectric constant (Dk) cannot be avoided, lowering the trace impedance will avoid narrow trace widths, leading to:
- Better impedance control
- Better loss performance
Avoid tightly coupled differential traces for a given routing density. Doing this will:
- Reduce the trace impedance fluctuation when having deskew trombone.
- Achieve larger trace widths for a given impedance target.
Implementing the key notes above will improve the trace geometry and impedance optimization in your PCB design.