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1. Intel® MAX® 10 User Flash Memory Overview
2. Intel® MAX® 10 UFM Architecture and Features
3. Intel® MAX® 10 UFM Design Considerations
4. Intel® MAX® 10 UFM Implementation Guides
5. On-Chip Flash Intel® FPGA IP Core References
6. Intel® MAX® 10 User Flash Memory User Guide Archive
7. Document Revision History for the Intel® MAX® 10 User Flash Memory User Guide
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4.2.5. UFM Page Erase Operation
The page erase operation allows the UFM to erase by pages.
To perform a UFM page erase operation, follow these steps:
- Disable the write protection mode. Write 0 into the write protection register for the sector through the Avalon-MM control interface.
- Write the appropriate bits into the control register to select the page erase location. The flash IP core stores the page erase address and initiates the page erase operation.
Note: The IP core only accepts the page erase address when the IP is in IDLE state; busy field at status register is 2'b00. If the IP core is busy, it will ignore the page erase address.
- The flash IP core sets the busy field in the status register to 2'b01 when the erase operation is in progress.
- The flash IP core then asserts the waitrequest signal if there are any new incoming read or write commands from the data interface.
- The flash IP core erases the page. It stores the physical flash erase result in the erase successful field in the status register when the page erase operation completes.
Note: The maximum erase time is 350 ms.
- The flash IP core sets the erase successful field in the status register to 1b'0 (failed) if you send an illegal address.
- Repeat the earlier steps if you want to perform another page erase operation.
- You have to enable back the write protection mode when the page erase operation completes. Write 1 into the write protection register for the corresponding page through the Avalon-MM control interface.
Note: Check the status register after each erase to make sure the erase operation is successful (erase successful).