Intel® MAX® 10 User Flash Memory User Guide

ID 683180
Date 8/30/2022
Public
Document Table of Contents

2.2. UFM Memory Organization Map

The address scheme changes based on the configuration mode you specify in the On-Chip Flash Intel® FPGA IP core parameter editor.

The following tables show the dynamic UFM support based on different configuration mode and Intel® MAX® 10 variant.

Table 2.  Dynamic Flash Size Support: Flash and Analog Variants
Configuration UFM1 UFM0 CFM2

(Image 2)

CFM1

(Image 2)

CFM0

(Image 1)

Dual compressed images UFM space UFM space
Single uncompressed image UFM space UFM space UFM space
Single compressed image UFM space UFM space UFM space UFM space
Single uncompressed image with memory initialization UFM space UFM space
Single compressed image with memory initialization UFM space UFM space
Table 3.  Dynamic Flash Size Support: Compact Variant
Configuration UFM1 UFM0 CFM2

(Image 2)

CFM1

(Image 2)

CFM0

(Image 1)

Dual compressed images Not available
Single uncompressed image UFM space UFM space
Single compressed image UFM space UFM space
Single uncompressed image with memory initialization Not available
Single compressed image with memory initialization Not available