Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide

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ID 683175
Date 12/03/2021
Public
Document Table of Contents
Document Table of Contents x
1. Overview of the Early Power Estimator for Intel® Stratix® 10 Devices 2. Setting Up the Early Power Estimator for Intel® Stratix® 10 Devices 3. Early Power Estimator for Intel® Stratix® 10 Graphical User Interface 4. Early Power Estimator Worksheets for Intel® Stratix® 10 Devices 5. Factors Affecting the Accuracy of the Early Power Estimator 6. Document Revision History for Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide A. Measuring Static Power
1. Overview of the Early Power Estimator for Intel® Stratix® 10 Devices x
1.1. Intel® Stratix® 10 EPE Power Model Status 1.2. Definitions of Power Terms Used in this Document
2. Setting Up the Early Power Estimator for Intel® Stratix® 10 Devices x
2.1. System Requirements 2.2. Download and Install the Early Power Estimator for Intel® Stratix® 10 Devices 2.3. Estimating Power Consumption with the Intel® Stratix® 10 Early Power Estimator
2.2. Download and Install the Early Power Estimator for Intel® Stratix® 10 Devices x
2.2.1. Changing the Macro Security Level in Microsoft Excel* 2003 2.2.2. Changing the Macro Security Level in Microsoft Excel* 2007 2.2.3. Changing the Macro Security Level in Microsoft Excel* 2010
2.3. Estimating Power Consumption with the Intel® Stratix® 10 Early Power Estimator x
2.3.1. Estimating Power Consumption Before Starting the FPGA Design 2.3.2. Estimating Power Consumption While Creating the FPGA Design 2.3.3. Estimating Power Consumption After Completing the FPGA Design
3. Early Power Estimator for Intel® Stratix® 10 Graphical User Interface x
3.1. Intel® Stratix® 10 EPE Input Fields 3.2. Intel® Stratix® 10 EPE Output Fields 3.3. Intel® Stratix® 10 EPE Input/Output Fields 3.4. Intel® Stratix® 10 EPE Field Shading 3.5. Intel® Stratix® 10 EPE Input Field Dependencies 3.6. Intel® Stratix® 10 EPE Buttons
4. Early Power Estimator Worksheets for Intel® Stratix® 10 Devices x
4.1. Intel® Stratix® 10 EPE - Common Worksheet Elements 4.2. Intel® Stratix® 10 EPE - Main Worksheet 4.3. Intel® Stratix® 10 EPE - Logic Worksheet 4.4. Intel® Stratix® 10 EPE - RAM Worksheet 4.5. Intel® Stratix® 10 EPE - DSP Worksheet 4.6. Intel® Stratix® 10 EPE - Clock Worksheet 4.7. Intel® Stratix® 10 EPE - PLL Worksheet 4.8. Intel® Stratix® 10 EPE - I/O Worksheet 4.9. Intel® Stratix® 10 EPE - I/O-IP Worksheet 4.10. Intel® Stratix® 10 EPE - XCVR Worksheet 4.11. Intel® Stratix® 10 EPE - HPS Worksheet 4.12. Intel® Stratix® 10 EPE - HBM Worksheet 4.13. Intel® Stratix® 10 EPE - Thermal Worksheet 4.14. Intel® Stratix® 10 EPE - Report Worksheet 4.15. Intel® Stratix® 10 EPE - Intel® Enpirion® Worksheet
5. Factors Affecting the Accuracy of the Early Power Estimator x
5.1. Toggle Rate 5.2. Temperature
1. Overview of the Early Power Estimator for Intel® Stratix® 10 Devices
2. Setting Up the Early Power Estimator for Intel® Stratix® 10 Devices
3. Early Power Estimator for Intel® Stratix® 10 Graphical User Interface
4. Early Power Estimator Worksheets for Intel® Stratix® 10 Devices
5. Factors Affecting the Accuracy of the Early Power Estimator
6. Document Revision History for Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide
A. Measuring Static Power

2.3.1. Estimating Power Consumption Before Starting the FPGA Design

Table 1.  Advantage and Constraints of Power Estimation before Designing FPGA
Advantage Constraint
  • You can obtain power estimates before starting your FPGA design.
  • You can adjust design resources and parameters and see how those changes affect total power consumption.
  • Accuracy depends on your inputs and your estimate of the device resources; where this information may change (during or after your design is complete), your power estimation results may be less accurate.
  • The Early Power Estimator spreadsheet uses averages and not the actual design implementation details. The Power Analyzer has access to the full design details. For example, the EPE uses average values for ALM configuration, while the Power Analyzer specifies an exact configuration for each ALM.

To estimate power consumption with the EPE spreadsheet before starting your FPGA design, follow these steps:

  1. On the Main worksheet of the EPE spreadsheet, select the target family, device, and package from the Family, Device, Device Grade, Package, and Transceiver Grade drop-down lists.
  2. Enter values for each worksheet in the EPE spreadsheet. Different worksheets in the EPE spreadsheet display different power sections, such as clocks and phase-locked loops (PLLs).
  3. The calculator displays the total estimated power consumption in the Total (W) cell of the Main worksheet.
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