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1. Overview of the Early Power Estimator for Intel® Stratix® 10 Devices
2. Setting Up the Early Power Estimator for Intel® Stratix® 10 Devices
3. Early Power Estimator for Intel® Stratix® 10 Graphical User Interface
4. Early Power Estimator Worksheets for Intel® Stratix® 10 Devices
5. Factors Affecting the Accuracy of the Early Power Estimator
6. Document Revision History for Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide
A. Measuring Static Power
4.1. Intel® Stratix® 10 EPE - Common Worksheet Elements
4.2. Intel® Stratix® 10 EPE - Main Worksheet
4.3. Intel® Stratix® 10 EPE - Logic Worksheet
4.4. Intel® Stratix® 10 EPE - RAM Worksheet
4.5. Intel® Stratix® 10 EPE - DSP Worksheet
4.6. Intel® Stratix® 10 EPE - Clock Worksheet
4.7. Intel® Stratix® 10 EPE - PLL Worksheet
4.8. Intel® Stratix® 10 EPE - I/O Worksheet
4.9. Intel® Stratix® 10 EPE - I/O-IP Worksheet
4.10. Intel® Stratix® 10 EPE - XCVR Worksheet
4.11. Intel® Stratix® 10 EPE - HPS Worksheet
4.12. Intel® Stratix® 10 EPE - HBM Worksheet
4.13. Intel® Stratix® 10 EPE - Thermal Worksheet
4.14. Intel® Stratix® 10 EPE - Report Worksheet
4.15. Intel® Stratix® 10 EPE - Intel® Enpirion® Worksheet
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2.3.3. Estimating Power Consumption After Completing the FPGA Design
If your design is complete, Intel strongly recommends using the Power Analyzer in the Intel® Quartus® Prime software. The Power Analyzer provides the most accurate estimate of device power consumption. The Power Analyzer uses toggle rates from simulation, user assignments, and placement-and-routing information to provide accurate power estimates.