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1.1.2.1. Specify Instance-Specific Constraints in Assignment Editor
1.1.2.2. Specify NoC Constraints in NoC Assignment Editor
1.1.2.3. Specify Dual Simplex Assignments in DS Assignment Editor
1.1.2.4. Specify I/O Constraints in Pin Planner
1.1.2.5. Plan Interface Constraints in Interface Planner and Tile Interface Planner
1.1.2.6. Adjust Constraints with the Chip Planner
1.1.2.7. Constraining Designs with the Design Partition Planner
3.2.1. Assigning to Exclusive Pin Groups
3.2.2. Assigning Slew Rate and Drive Strength
3.2.3. Assigning I/O Banks
3.2.4. Changing Pin Planner Highlight Colors
3.2.5. Showing I/O Lanes
3.2.6. Assigning Differential Pins
3.2.7. Entering Pin Assignments with Tcl Commands
3.2.8. Entering Pin Assignments in HDL Code
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2.1.2.5. Step 5: Report Placement Data
Generate Interface Planner placement and connectivity reports to help locate cells and make the best decisions about placement for the interfaces and elements in your design. Click View Reports on the Flow control to open the Reports tab from which you can generate a range of reports.
Follow these steps to report Interface Planner placement data:
- In the Flow control, click View Reports. The list of reports appears in the Tasks pane.
- In the Tasks pane, double-click any report name to generate the report in the Table of Contents pane.
- Select design elements in the report and click Place, Unplace, or report detailed data about the selected elements or locations.
Figure 24. Reports Tab