Intel® Quartus® Prime Pro Edition User Guide: Design Constraints

ID 683143
Date 4/03/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.5.2. Adjusting I/O Timing and Power with Capacitive Loading

When calculating tCO and power for output and bidirectional pins, the Timing Analyzer and the Power Analyzer use a bulk capacitive load. You can adjust the value of the capacitive load per I/O standard to obtain more precise tCO and power measurements, reflecting the behavior of the output or bidirectional net on your PCB. The Intel® Quartus® Prime software ignores capacitive load settings on input pins. You can adjust the capacitive load settings per I/O standard, in picofarads (pF), for your entire design. During compilation, the Compiler measures power and tCO measurements based on your settings. You can also adjust the capacitive load on an individual pin with the Output Pin Load logic option.