PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes

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ID 683090
Date 4/01/2024
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PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes
PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes x
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) Release Notes ( Agilex™ 7 M-Series Devices) PHY Lite for Parallel Interfaces Intel® FPGA IP (altera_phylite_s20) Release Notes ( Agilex™ 7 F-Series and I-Series Devices) PHY Lite for Parallel Interfaces Intel FPGA IP Core v19.3.0 PHY Lite for Parallel Interfaces Intel FPGA IP Core v18.1 PHY Lite for Parallel Interfaces Intel FPGA IP Core v18.0 Intel FPGA PHYLite for Parallel Interfaces IP Core v17.1 Altera PHYLite for Parallel Interfaces IP Core v16.0 Altera PHYLite for Parallel Interfaces IP Core v15.1 Altera PHYLite for Memory IP Core v14.1 Altera PHYLite for Memory IP Core v14.0 Arria 10 Edition PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide Document Archives
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) Release Notes ( Agilex™ 7 M-Series Devices) x
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v5.0.0 PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v4.1.0 PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v4.0.0 PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v3.0.0 PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v2.0.0
PHY Lite for Parallel Interfaces Intel® FPGA IP (altera_phylite_s20) Release Notes ( Agilex™ 7 F-Series and I-Series Devices) x
PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v22.3.0 PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v22.1.0 PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v21.0.0 PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v20.3.0
PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes

PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v4.1.0

Table 2.  v4.1.0 2024.1.12
Quartus® Prime Version Description Impact
23.4
  • Changed the default value of the GROUP_X_RCVEN_TO_READ_VALID_OFFSET parameter.
  • Added a new register to turn on Internal Clocks to the register address map.
 Intel recommends that you regenerate your IP.
Level Two Title