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PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) Release Notes ( Agilex™ 7 M-Series Devices)
PHY Lite for Parallel Interfaces Intel® FPGA IP (altera_phylite_s20) Release Notes ( Agilex™ 7 F-Series and I-Series Devices)
PHY Lite for Parallel Interfaces Intel FPGA IP Core v19.3.0
PHY Lite for Parallel Interfaces Intel FPGA IP Core v18.1
PHY Lite for Parallel Interfaces Intel FPGA IP Core v18.0
Intel FPGA PHYLite for Parallel Interfaces IP Core v17.1
Altera PHYLite for Parallel Interfaces IP Core v16.0
Altera PHYLite for Parallel Interfaces IP Core v15.1
Altera PHYLite for Memory IP Core v14.1
Altera PHYLite for Memory IP Core v14.0 Arria 10 Edition
PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide Document Archives
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v5.0.0
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v4.1.0
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v4.0.0
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v3.0.0
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v2.0.0
PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v22.3.0
PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v22.1.0
PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v21.0.0
PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v20.3.0
Visible to Intel only — GUID: kvr1509325373069
Ixiasoft
Intel FPGA PHYLite for Parallel Interfaces IP Core v17.1
Description | Impact |
---|---|
Added support for Stratix® 10 and Cyclone® 10 GX devices. | — |
Added support dynamic reconfiguration and non dynamic reconfiguration design example for Stratix® 10 and Cyclone® 10 GX devices. | — |
Renamed Altera PHYLite for Parallel Interfaces IP core to Intel FPGA PHYLite for Parallel Interfaces IP core as per Intel rebranding. | — |