Visible to Intel only — GUID: pnj1517279120792
Ixiasoft
Visible to Intel only — GUID: pnj1517279120792
Ixiasoft
PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes
If a release note is not available for a specific IP version, the IP has no changes in that version. For information on IP update releases up to v18.1, refer to the Quartus® Prime Design Suite Update Release Notes.
Intel® FPGA IP versions match the Quartus® Prime Design Suite software versions until v19.1. Starting in Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.
The Intel® FPGA IP version (X.Y.Z) number can change with each Quartus® Prime software version. A change in:
- X indicates a major revision of the IP. If you update the Quartus® Prime software, you must regenerate the IP.
- Y indicates the IP includes new features. Regenerate your IP to include these new features.
- Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
Section Content
PHY Lite for Parallel Interfaces Intel FPGA IP (phylite_ph2) Release Notes ( Agilex 7 M-Series Devices)
PHY Lite for Parallel Interfaces Intel FPGA IP (altera_phylite_s20) Release Notes ( Agilex 7 F-Series and I-Series Devices)
PHY Lite for Parallel Interfaces Intel FPGA IP Core v19.3.0
PHY Lite for Parallel Interfaces Intel FPGA IP Core v18.1
PHY Lite for Parallel Interfaces Intel FPGA IP Core v18.0
Intel FPGA PHYLite for Parallel Interfaces IP Core v17.1
Altera PHYLite for Parallel Interfaces IP Core v16.0
Altera PHYLite for Parallel Interfaces IP Core v15.1
Altera PHYLite for Memory IP Core v14.1
Altera PHYLite for Memory IP Core v14.0 Arria 10 Edition
PHY Lite for Parallel Interfaces Intel FPGA IP User Guide Document Archives