Intel® Acceleration Stack User Guide: Intel FPGA Programmable Acceleration Card N3000

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ID 683040
Date 6/14/2021
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. System Requirements 3. Hardware Installation 4. Installing the OPAE Software 5. OPAE Tools 6. Sample Test: Native Loopback 7. Installing the Intel XL710 Driver 8. Configuring Ethernet Interfaces 9. Testing Network Loopback Using Data Plane Development Kit (DPDK) 10. Graceful Shutdown 11. Single Event Upset (SEU) 12. Document Revision History for Intel Acceleration Stack User Guide: Intel® FPGA PAC N3000 A. Troubleshooting B. Upgrade your Intel® FPGA PAC N3000 with Production Version of BMC and Intel® Arria® 10 Image C. Configure the 4.19 Kernel D. fpgabist Sample Output
1. About this Document x
1.1. Acronym List
2. System Requirements x
2.1. Cooling Requirements
3. Hardware Installation x
3.1. Installing the Intel® FPGA PAC N3000
4. Installing the OPAE Software x
4.1. Install Additional Packages 4.2. Install the Release Package 4.3. Identify the Intel® MAX® 10 Version on your Intel® FPGA PAC N3000
4.2. Install the Release Package x
4.2.1. Remove Previous OPAE Packages 4.2.2. Install the Acceleration Stack for Runtime 4.2.3. Install the Acceleration Stack for Development 4.2.4. Verify the OPAE Installation 4.2.5. Install the Configuration Files
4.3. Identify the Intel® MAX® 10 Version on your Intel® FPGA PAC N3000 x
4.3.1. FPGA Factory Image Overview
5. OPAE Tools x
5.1. Using fpgasupdate 5.2. Using fpgainfo 5.3. Test PCIe and External Memories with fpgabist 5.4. Test Network Loopback using fpgadiag
7. Installing the Intel XL710 Driver x
7.1. Updating the Intel XL710 Firmware
8. Configuring Ethernet Interfaces x
8.1. Modifying the Interface Maximum Transmission Unit (MTU) Size 8.2. Setting Forward Error Correction (FEC) Mode 8.3. Ethernet Pause Flow Control 8.4. Get Link Status and Statistics
9. Testing Network Loopback Using Data Plane Development Kit (DPDK) x
9.1. Test Using an External Traffic Generator 9.2. Test Using a Packet Generator 9.3. Troubleshooting in DPDK 9.4. Revert Back from DPDK to OPAE
10. Graceful Shutdown x
10.1. Background 10.2. Using OPAE 10.3. Using DPDK
11. Single Event Upset (SEU) x
11.1. OPAE Handling of SEU 11.2. DPDK Handling of SEU
A. Troubleshooting x
A.1. If OPAE installation verification fails, how to install OPAE manually?
B. Upgrade your Intel® FPGA PAC N3000 with Production Version of BMC and Intel® Arria® 10 Image x
B.1. Upgrading from 1.1 Beta to Production Version B.2. Upgrading from 1.1 Alpha-2 or Older to Production Version
B.1. Upgrading from 1.1 Beta to Production Version x
B.1.1. Root Entry Hash Programmed B.1.2. Root Entry Hash Not Programmed
D. fpgabist Sample Output x
D.1. For 2x2x25G Configuration D.2. For 8x10G Configuration
1. About this Document
2. System Requirements
3. Hardware Installation
4. Installing the OPAE Software
5. OPAE Tools
6. Sample Test: Native Loopback
7. Installing the Intel XL710 Driver
8. Configuring Ethernet Interfaces
9. Testing Network Loopback Using Data Plane Development Kit (DPDK)
10. Graceful Shutdown
11. Single Event Upset (SEU)
12. Document Revision History for Intel Acceleration Stack User Guide: Intel® FPGA PAC N3000
A. Troubleshooting
B. Upgrade your Intel® FPGA PAC N3000 with Production Version of BMC and Intel® Arria® 10 Image
C. Configure the 4.19 Kernel
D. fpgabist Sample Output

8.4. Get Link Status and Statistics

To retrieve the line side link status, use the Linux ethtool and get link statistics using OPAE fpgastats command: 
$ ethtool npacf0g0l0
Sample output: 
Settings for npacf0g0l0:
Link detected: yes

$ ethtool -S npacf0g0l1 
This command lists FPGA Ethernet counters

$ ethtool -S p7p1
This command lists XL710 Ethernet counters
Note: The Ethernet links between the FPGA and XL710 controllers is always up when the FPGA is being programmed.
The OPAE fpgastats command lists all FPGA Ethernet MAC counters on the Intel® FPGA PAC N3000 specified by bus number. The fpgastats command is useful for detecting packet drops inside the FPGA because it provides both Ethernet wrapper 0 and 1 in an easily read format. 
$ sudo fpgastats [-h] [--segment SEGMENT] [--bus BUS] [--device DEVICE] [--function FUNCTION] [--clear] [--debug]

optional arguments:
  -h, --help            show this help message and exit
  --segment SEGMENT, -S SEGMENT
                        Segment number of PCIe device
  --bus BUS, -B BUS     Bus number of PCIe device
  --device DEVICE, -D DEVICE
                        Device number of PCIe device
  --function FUNCTION, -F FUNCTION
                        Function number of PCIe device
  --clear, -c           Clear statistics
  --debug, -d           Output debug information
You can clear Ethernet counts with the clear option: 
$ sudo fpgastats -B 0x8a -c
Note: The XL710 controller does not support the OPAE fpgastats command.
Figure 16. Sample Output
Table 10.  MUX and DEMUX Counters
Name Description
tx_stats_* Refer to Low Latency Ethernet 10G MAC Intel FPGA IP User Guide.
rx_stats_*
CNTR_TX_* Refer to 25G Ethernet Intel Arria 10 FPGA IP User Guide or Low Latency 40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide.
CNTR_RX_*
MUX_CDC_FIFO_CNTR_FULL Drop counter on MUX. Increments when mux_cdc_fifo is full and there is no space for current packet.
MUX_CDC_FIFO_CNTR_ERROR Counts packets marked with error on RX Avalon® streaming interface of MUX.
MUX_CDC_FIFO_CNTR_SOP_MISSED Counts missed SOP on RX Avalon® streaming interface of MUX.
MUX_CDC_FIFO_CNTR_EOP_MISSED Counts missed EOP on RX Avalon® streaming interface of MUX.
DEMUX_CDC_FIFO_CNTR_FULL Drop counter on DEMUX. Increments when demux_cdc_fifo is full and there are no space for current packet.
DEMUX_CDC_FIFO_CNTR_ERROR Counts packets marked with error on RX Avalon® streaming interface of DEMUX.
DEMUX_CDC_FIFO_CNTR_SOP_MISSED Counts missed SOP on RX Avalon® streaming interface of DEMUX
DEMUX_CDC_FIFO_CNTR_EOP_MISSED Counts missed EOP on RX Avalon® streaming interface of DEMUX
For more information about MUX and DEMUX counters, refer to the Ethernet Interface.
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