Intel® Fortran Compiler Classic and Intel® Fortran Compiler Developer Guide and Reference

ID 767251
Date 3/31/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

xHost, QxHost

Tells the compiler to generate instructions for the highest instruction set available on the compilation host processor.

Syntax

Linux:

-xHost

macOS:

-xHost

Windows:

/QxHost

Arguments

None

Default

varies

On Windows systems, if neither /Qx nor /arch is specified, the default target architecture supports Intel® SSE2 instructions.

On Linux systems, if neither -x nor -m is specified, the default target architecture supports Intel® SSE2 instructions.

The default on macOS systems is [Q]xSSSE3.

Description

This option tells the compiler to generate instructions for the highest instruction set available on the compilation host processor.

The instructions generated by this compiler option differ depending on the compilation host processor.

The following table describes the effects of specifying the [Q]xHost option and it tells whether the resulting executable will run on processors different from the host processor.

Descriptions in the table refer to Intel® Advanced Vector Extensions 2 (Intel® AVX2), Intel® Advanced Vector Extensions (Intel® AVX), Intel® Streaming SIMD Extensions (Intel® SSE), and Supplemental Streaming SIMD Extensions (SSSE).

Instruction Set of Host Processor

Effects When the -xHost or /QxHost Compiler Option is Specified

Intel® AVX2

When compiling on Intel® processors:

Corresponds to option [Q]xCORE-AVX2. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® AVX2 instructions.

When compiling on non-Intel processors:

Corresponds to option -march=core-avx2 (Linux* and macOS) or /arch:CORE-AVX2 (Windows*). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® AVX2 instructions.. You may see a runtime error if the runtime processor does not support Intel® AVX2 instructions.

Intel® AVX

When compiling on Intel® processors:

Corresponds to option [Q]xAVX. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® AVX instructions.

When compiling on non-Intel processors:

Corresponds to option -mavx (Linux and macOS) or /arch:AVX (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® AVX instructions. You may see a runtime error if the runtime processor does not support Intel® AVX instructions.

Intel® SSE4.2

When compiling on Intel® processors:

Corresponds to option [Q]xSSE4.2. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSE4.2 instructions.

When compiling on non-Intel processors:

Corresponds to option -msse4.2 (Linux and macOS) or /arch:SSE4.2 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE4.2 instructions. You may see a runtime error if the runtime processor does not support Intel® SSE4.2 instructions.

Intel® SSE4.1

When compiling on Intel® processors:

Corresponds to option [Q]xSSE4.1. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSE4.1 instructions.

When compiling on non-Intel processors:

Corresponds to option -msse4.1 (Linux and macOS) or /arch:SSE4.1 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE4.1 instructions. You may see a runtime error if the runtime processor does not support Intel® SSE4.1 instructions.

SSSE3

When compiling on Intel® processors:

Corresponds to option [Q]xSSSE3. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support SSSE3 instructions.

When compiling on non-Intel processors:

Corresponds to option -mssse3 (Linux and macOS) or /arch:SSSE3 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least SSSE3 instructions. You may see a runtime error if the runtime processor does not support SSSE3 instructions.

Intel® SSE3

When compiling on Intel® processors:

Corresponds to option [Q]xSSE3. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSE3 instructions.

When compiling on non-Intel processors:

Corresponds to option -msse3 (Linux and macOS) or /arch:SSE3 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE3 instructions. You may see a warning runtime error if the runtime processor does not support Intel® SSE3 instructions.

Intel® SSE2

When compiling on Intel® processors or non-Intel processors:

Corresponds to option -msse2 (Linux) or /arch:SSE2 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE2 instructions. You may see a runtime error if the runtime processor does not support Intel® SSE2 instructions.

This value is not available on macOS systems.

For more information on other settings for option [Q]x, see that option description.

NOTE:

This option only applies to host compilation. When offloading is enabled, it does not impact device-specific compilation. Offloading can only be enabled when using ifx.

Product and Performance Information

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.

Notice revision #20201201

IDE Equivalent

Visual Studio: Code Generation > Intel Processor-Specific Optimization

Alternate Options

None

See Also