ID
813663
Date
4/01/2024
Public
Visible to Intel only — GUID: xdt1639575163510
Ixiasoft
1. Low Latency Ethernet 10G MAC Intel® FPGA IP Overview
2. Getting Started
3. Functional Description
4. Parameter Settings for the Low Latency Ethernet 10G MAC Intel® FPGA IP Core
5. Interface Signals
6. Configuration Registers
7. Document Revision History for the Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs
2.1. Introduction to Intel® FPGA IP Cores
2.2. Installing and Licensing Intel® FPGA IP Cores
2.3. Specifying the IP Core Parameters and Options ( Quartus® Prime Pro Edition)
2.4. Generated File Structure
2.5. Simulating Intel® FPGA IP Cores
2.6. Upgrading the Low Latency Ethernet 10G MAC Intel® FPGA IP Core
2.7. Low Latency Ethernet 10G MAC Intel® FPGA IP Design Examples
5.1. Clock and Reset Signals
5.2. Speed Selection Signal
5.3. Error Correction Signals
5.4. Avalon® Memory-Mapped Interface Programming Signals
5.5. Avalon® Streaming Data Interfaces
5.6. Avalon® Streaming Flow Control Signals
5.7. Avalon® Streaming Status Interface
5.8. PHY-side Interfaces
5.9. IEEE 1588v2 Interfaces
Visible to Intel only — GUID: xdt1639575163510
Ixiasoft
1. Low Latency Ethernet 10G MAC Intel® FPGA IP Overview
Updated for: |
---|
Intel® Quartus® Prime Design Suite 24.1 |
IP Version 2.0.0 |
The Low Latency Ethernet 10G MAC Intel® FPGA IP is a configurable component that implements the IEEE 802.3-2008 specification. To build a complete Ethernet subsystem in an Intel FPGA device and connect it to an external device, you can use the Low Latency Ethernet 10G MAC Intel® FPGA IP with an Intel FPGA PHY IP or any of the supported PHYs.
The figure below shows a system with the Low Latency Ethernet 10G MAC Intel® FPGA IP.
Figure 1. Typical Application of Low Latency (LL) Ethernet 10G (10GbE) MAC
Note: Intel FPGAs implement and support the Low Latency Ethernet 10G MAC and 1G/2.5G/5G/10G Multirate Ethernet PHY (PCS + PMA) Intel® FPGA IPs to interface in a chip-to-chip or chip-to-module channel with external MGBASE (1G/2.5G) and NBASE (1G/2.5G/5G/10Gb Ethernet) PHY standard devices.