Visible to Intel only — GUID: gmn1663243543573
Ixiasoft
Visible to Intel only — GUID: gmn1663243543573
Ixiasoft
5.4. Resets
Signal Name | Direction | Type | Description |
---|---|---|---|
subsystem_cold_rst_n | In | Reset | Asynchronous, active-low hard global reset. Resets the TX MAC, RX MAC, TX PCS, RX PCS, transceivers (transceiver reconfiguration registers and interface), and Ethernet reconfiguration registers. This reset leads to the de-assertion of the o_tx_lanes_stableand o_rx_pcs_ready output signals. |
i_p<n>_tx_rst_n | In | Reset | Asynchronous, active-low hard reset. Resets the TX interface, including the TX PCS and TX MAC. This reset leads to the de-assertion of the o_tx_lanes_stable output signal. |
i_p<n>_rx_rst_n | In | Reset | Asynchronous, active-low hard reset. Resets the RX interface, including the RX PCS and RX MAC. This reset leads to the de-assertion of the o_rx_pcs_ready output signal. |
o_p<n>_tx_rst_ack_n | Out | Reset Acknowledge | Activelow acknowledge signal for i_tx_rst_n. The user should not de-assert i_tx_rst_n until o_tx_rst_ack_n is asserted. |
o_p<n>_rx_rst_ack_n | Out | Reset Acknowledge | Activelow acknowledge signal for i_rx_rst_n. The user should not de-assert i_rx_rst_n until o_rx_rst_ack_n is asserted. |
subsystem_cold_rst_ack_n | Out | Reset Acknowledge | Activelow acknowledge signal for subsystem_cold_rst_n. The user should not de-assert subsystem_cold_rst_n until subsystem_cold_rst_ack_nis asserted. |
Reset Signal | Ethernet Subsystem IP Block |
---|---|
subsystem_cold_rst_n |
|
app_ss_st_txphydirect_areset_n | AXI-ST Bridge TX Logic/PTP TX |
app_ss_st_rxphydirect_areset_n | AXI-ST Bridge RX Logic/PFC RX Logic |
app_ss_lite_areset_n | AXI-Lite Bridge |
i_tx_rst |
|
i_rx_rst |
|