Ethernet Subsystem Intel® FPGA IP User Guide

ID 773413
Date 10/02/2023
Public

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Document Table of Contents

1.1. Supported Features

Table 1.  Ethernet Subsystem Intel FPGA IP Features
Features Description Devices
Number of ports 1 – 16 ports E-Tile F-Tile
Port Profile 10GbE E-Tile F-Tile
25GbE E-Tile F-Tile
40GbE CAUI-4 - F-Tile
50GbE GAUI-1 - F-Tile
50GbE GAUI-2 - F-Tile
100GbE CAUI-1 - F-Tile
100GbE CAUI-2 E-Tile -
100GbE CAUI-4 E-Tile F-Tile
200GbE GAUI-2 - F-Tile
200GbE GAUI-4 - F-Tile
200GbE GAUI-8 - F-Tile
400GbE GAUI-4 - F-Tile
400GbE GAUI-8 - F-Tile
CPRI E-Tile -
Sub-profile MAC + PCS E-Tile F-Tile
PCS E-Tile -
OTN E-Tile -
FlexE E-Tile -
CPRI: 2.4G_PMA, 4.9G_PMA, 9.8G_PMA, 10.1G_PCS, 12.2G_PCS, 24.3G_PCS E-Tile -
Client Interface AXI4-Streaming Interface E-Tile F-Tile
AXI4-Lite Interface E-Tile F-Tile
Other Reed-Solomon Forward Error Correction (RS-FEC) E-Tile (Not available for 10GbE) F-Tile (Not available for 10GbE, 40GbE)
IEEE 1588 Precision Time Protocol (PTP) E-Tile F-Tile (Not Available for 40GbE)
Auto-negotiation (AN) and Link training (LT) E-Tile F-Tile