Ethernet Subsystem Intel® FPGA IP User Guide

ID 773413
Date 10/02/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.1.5. Feature CSR ADDR

Description: Feature CSR Address

Byte Offset: 0x18 (32b LSB) - 0x1C (32b MSB)

Addressing Mode: 32 bits

Bit Type Value after Reset Description
63:1 RO 0x60

Reserved

0:0 RO 0

Reserved