2024.04.29 |
24.1 |
4.0.0 |
- In the Quick Start chapter:
- Modified the list of supported simulators in the Simulating the High Bandwidth Memory (HBM2E) Interface FPGA IP topic.
- Added the Using the HBM2E Design Example with the Test Engine IP topic
- Added the Enabling and Using the HBM2E Design Example with the Performance Monitor topic.
- In the Design Example Description chapter, modified Figure 10 in the AXI4-Lite Support topic.
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2023.12.04 |
23.4 |
3.0.0 |
- In the Quick Start chapter:
- Added the Running the Test Engine IP with the HBM2E Design Example topic.
- Added the Running the Performance Monitor with the HBM2E Design Example topic.
- Added the Running the AXI4-Lite-enabled Design Example in Hardware and Simulation topic.
- In the Design Example Description chapter:
- Added a bullet point describing the performance monitor (PMON).
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2023.10.02 |
23.3 |
2.0.0 |
- In the Quick Start chapter:
- Added a new step 4 to the Generating the High Bandwidth Memory (HBM2E) Interface Intel FPGA IP Design Example for Synthesis and Simulation topic, and updated the screenshot figure.
- Added additional steps to the procedure in the Compiling and Programming the Intel Agilex 7 M-Series High Bandwidth Memory (HBM2E) Interface Intel FPGA IP Design Example topic.
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2023.06.26 |
23.2 |
1.3.0 |
- In the Design Example Description chapter, modified the figures in the AXI-Lite Support topic.
- Minor editorial updates throughout.
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2023.04.21 |
23.1 |
1.2.0 |
Initial release. |