External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP User Guide

ID 772538
Date 6/26/2023
Public

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5.1.4. Simulating the Design Example

This topic describes how to simulate the design example in Synopsys* , and Siemens EDA simulators.

To simulate the example design in the Intel® Quartus® Prime software using the Synopsys* simulator, follow these steps:

  1. At the Linux* shell command prompt, change directory to sim\ed_sim\synopsys\vcsmx
  2. Run the simulation by typing the following command at the command prompt:
    sh vcsmx_setup.sh

To simulate the example design in the Intel® Quartus® Prime software using the Siemens EDA simulator, follow these steps:

  1. At the Linux or Windows shell command prompt, change directory to sim\ed_sim\mentor
  2. Execute the msim_setup.tcl script that automatically compiles and runs the simulation by typing the following command at the Linux or Windows command prompt:
    vsim -do msim_setup.tcl

    or

    Type the following command at the ModelSim* command prompt:

    do msim_setup.tcl
    
  3. Type the command ld_debug. When this command completes, you can select the desired signal into the waveform.
  4. Type run-all to run the simulation.

For more information about simulating the external memory interface using the Siemens EDA simulator, refer to the Simulating External Memory Interface IP With ModelSim chapter in the External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP Design Example User Guide.

Note: Intel does not provide the run.do file for the example design with the EMIF interface.

For more information about simulation, refer to the Intel® Quartus® Prime Pro Edition User Guide, Third-party Simulation.

If your Intel® Quartus® Prime project appears to be configured correctly but the example testbench still fails, check the known issues on the Intel FPGA Knowledge Base before filing a service request.