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Visible to Intel only — GUID: xdi1719273358623
Ixiasoft
Visible to Intel only — GUID: xdi1719273358623
Ixiasoft
6.13. Performing Inference Without an FPGA Board
The software emulation model is a C++ software model of the FPGA AI Suite IP that is bit-accurate*. The emulation models relatively low-level transactions and, in some cases, models processing delays of modules.
- Build the runtime with the following commands:
cd $COREDLA_WORK/runtime rm -rf build_Release ./build_runtime.sh -target_emulation
- Run inference with the -niter=1 and -nireq=1 options (because the software model is reasonably slow) with the following commands:
modeldir=$COREDLA_WORK/demo/models/public imagedir=$COREDLA_WORK/demo/sample_images curarch=$COREDLA_ROOT/example_architectures/AGX7_Performance.arch gnd=$imagedir/TF_ground_truth.txt cd $COREDLA_WORK/runtime/build_Release/dla_benchmark ./dla_benchmark \ -b 1 `# Run only a single image` \ -niter 1 `# Run only a single image` \ -nireq 1 `# Running emulator: so -nireq=1` \ -m $modeldir/resnet-50-tf/FP32/resnet-50-tf.xml \ `# Same as when running on hardware - specify the graph` \ -d HETERO:FPGA,CPU \ `# Same as when running on hardware - \ use FPGA if possible, fallback to CPU` \ -i $imagedir \ `# Same as when running on hardware - specify image directory` \ -arch_file $curarch \ `# Same as when running on hardware - specify .arch file` \ -dump_output \ `# Dump output result.txt file` \ -plugins emulation \ `# Use the software emulator` \ -groundtruth_loc $gnd `# Location of the ground truth file for $imagedir`