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1. FPGA AI Suite Getting Started Guide
2. FPGA AI Suite Components
3. FPGA AI Suite Installation Overview
4. Installing the FPGA AI Suite Compiler and IP Generation Tools
5. Installing the FPGA AI Suite PCIe-Based Design Example Prerequisites
6. FPGA AI Suite Quick Start Tutorial
7. Running the Hostless DDR-Free Design Example
A. FPGA AI Suite Getting Started Guide Archives
B. FPGA AI Suite Getting Started Guide Document Revision History
4.1. Supported FPGA Families
4.2. Operating System Prerequisites
4.3. Installing the FPGA AI Suite with System Package Management Tools
4.4. Installing OpenVINO™ Toolkit
4.5. Installing Quartus® Prime Pro Edition Software
4.6. Setting Required Environment Variables
4.7. Installing Intel® Threading Building Blocks (TBB)
4.8. Finalizing Your FPGA AI Suite Installation
6.1. Creating a Working Directory
6.2. Preparing OpenVINO™ Model Zoo
6.3. Preparing a Model
6.4. Running the Graph Compiler
6.5. Preparing an Image Set
6.6. Programming the FPGA Device
6.7. Performing Inference on the PCIe-Based Example Design
6.8. Building an FPGA Bitstream for the PCIe Example Design
6.9. Building the Example FPGA Bitstreams
6.10. Preparing a ResNet50 v1 Model
6.11. Performing Inference on the Inflated 3D (I3D) Graph
6.12. Performing Inference on YOLOv3 and Calculating Accuracy Metrics
6.13. Performing Inference Without an FPGA Board
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1. FPGA AI Suite Getting Started Guide
| Updated for: |
|---|
| Intel® FPGA AI Suite 2024.3 |
The FPGA AI Suite Getting Started Guide provides the following information:
- An overview of the FPGA AI Suite
- Installation instructions and a list of prerequisites
- A tutorial that walks you through the process of running inference on a ResNet-50 graph, including performance and area estimation
About the FPGA AI Suite Documentation Library
Documentation for the FPGA AI Suite is split across a few publications. Use the following table to find the publication that contains the FPGA AI Suite information that you are looking for:
| Title and Description | |
|---|---|
| Release Notes Provides late-breaking information about the FPGA AI Suite including new features, important bug fixes, and known issues. |
Link |
| Getting Started Guide Get up and running with the FPGA AI Suite by learning how to initialize your compiler environment and reviewing the various design examples and tutorials provided with the FPGA AI Suite |
Link |
| IP Reference Manual Provides an overview of the FPGA AI Suite IP and the parameters you can set to customize it. This document also covers the FPGA AI Suite IP generation utility. |
Link |
| Compiler Reference Manual Describes the use modes of the graph compiler (dla_compiler). It also provides details about the compiler command options and the format of compilation inputs and outputs. |
Link |
| PCIe-based Design Example User Guide Describes the design and implementation for accelerating AI inference using the FPGA AI Suite, Intel® Distribution of OpenVINO™ toolkit, and a Terasic* DE10-Agilex Development Board. |
Link |
| SoC-based Design Example User Guide Describes the design and implementation for accelerating AI inference using the FPGA AI Suite, Intel® Distribution of OpenVINO™ toolkit, and an Arria® 10 SX SoC FPGA Development Kit (DK-SOC-10AS066S) or Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit. |
Link |
Intel® Distribution of OpenVINO™ toolkit Requirement
To use the FPGA AI Suite, you must be familiar with the Intel® Distribution of OpenVINO™ toolkit.
FPGA AI Suite Version 2024.3 requires the Intel® Distribution of OpenVINO™ toolkit Version 2023.3 LTS. For OpenVINO™ documentation, refer to https://docs.openvino.ai/2023.3/documentation.html.