F-Tile 25G Ethernet Intel® FPGA IP User Guide

ID 750198
Date 7/08/2024
Public
Document Table of Contents

10. Document Revision History for the F-Tile 25G Ethernet Intel FPGA IP User Guide

Document Version Quartus® Prime Version IP Version Changes
2024.07.08 24.2 6.0.0 Updated Reset Signals Functions table.
2024.04.15 23.4 4.0.0
  • Added support for Agilex 9 devices. Agilex™ 9 support is only available from Quartus® Prime Pro Edition software version 23.2 onwards.
  • Added Agilex 9 device information in the Intel Device Family Support table.
2023.12.04 23.4 4.0.0
  • Added a new topic: Analog Parameter Tab Options.
  • Added a new topic: Analog Parameter Settings.
2023.11.29 23.2 2.0.0
  • Added information about dynamic reconfiguration feature support:
    • Added PLL Configuration Example for F-Tile 10G/25G Configuration diagram in Adding the F-Tile Reference and System PLL Clocks Intel FPGA IP topic.
    • Added F-Tile 10G/25G Ethernet MAC, PCS, and PMA IP Block Diagram diagram in About this IP topic.
    • Updated Features topic.
    • Updated Parameters topic.
    • Added Dynamic Reconfiguration QSF Settings topic.
    • Added Dynamic Reconfiguration Interface topic.
  • Updated product family name to " Intel Agilex® 7".
2023.02.09 22.3 1.0.0 Fixed reset signal name i_reconfig_reset to reconfig_reset in the following topics:
  • Reset topic
  • Reset Signals topic
2022.10.14 22.3 1.0.0 Initial release.