Nios® V Processor Software Developer Handbook

ID 743810
Date 5/26/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

8.6.1. Exception Handling System Structure

The exception handling system consists of the following components:
  • The general exception funnel
  • The hardware interrupt funnel
    • An ISR for each peripheral that generates hardware interrupts
  • The software exception funnel
  • Software interrupt handler
  • Timer interrupt handler

With the IIC, there is a single hardware interrupt funnel. This funnel manages processor context switch and RTOS overhead (if any). It determines the source of the IRQ, and dispatches the correct ISR.

With the IIC, when the Nios® V processor generates an exception, the general exception funnel receives control. Based on the exception type, the general exception funnel passes control to the software exception funnel, hardware interrupt funnel or the respective interrupt handlers. The hardware interrupt funnel passes control to one or more ISRs.

Each time an exception occurs, the exception handling system services either a software exception or interrupts, with hardware interrupts having a higher priority than the other interrupts. The HAL IIC support does not include nested exceptions but can handle multiple hardware interrupts per context switch.