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1. About the RiscFree* IDE
2. Getting Started with the Ashling* RiscFree* IDE for Intel® FPGAs
3. Using Ashling* RiscFree* IDE for Intel® FPGAs with Nios® V Processor System
4. Using Ashling* RiscFree* IDE for Intel® FPGAs with Arm* Hard Processor System
5. Debugging Features with RiscFree* IDE for Intel® FPGAs
6. Debugging with Command-Line Interface
7. Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide Archives
8. Document Revision History for the Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide
A. Appendix
3.1. Importing Nios® V Processor Project
3.2. Building Nios® V Processor Project
3.3. Setting Run Configuration to Download Nios® V Processor Project
3.4. Setting Debug Configuration to Debug Nios® V Processor Project
3.5. Setting Debug Configuration to Debug a Booting Nios® V Processor Project
3.6. Debugging Tools
5.1. Debug Features in RiscFree* IDE
5.2. Processor System Debug
5.3. Heterogeneous Multicore Debug
5.4. Debugging µC/OS-II Application
5.5. Debugging FreeRTOS Application
5.6. Debugging Zephyr Application
5.7. Arm* HPS On-Chip Trace
5.8. Debugging the Arm* Linux Kernel
5.9. Debugging Target Software in an Intel® Simics Simulator Session
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5.7.2. Trace View
Trace Information | Description |
---|---|
Timestamp | The timestamp value received from the target |
Cycles | The CPU cycle count information. The cycle count is available from the target for a set of instructions only. Cycle count against an instruction represents the number of CPU cycles consumed for the set of instructions starting from the last cycle count received. |
Context ID | Context ID of the current execution. Context ID gives the information about the ASID and the current Process ID. |
Core No | Core index of the core executing the trace data. |
Address | The instruction address executed by the CPU. |
Opcode | Opcode of the executed instruction. |
Disassembly | Disassembly of the executed instruction. |
Source Line | Source Line corresponding to the instruction execution. |
Example Use Case: Disassembly View
Double click the trace row to highlight the corresponding source line and disassembly in Source and Disassembly view. Refer Figure Trace View and the following figures for more details.
Figure 65. Source Highlighting — Debug and Disassembly Tab
Figure 66. Source Highlighting — main.c Tab